Kawaguchi, Japan

Kazushi Tomita

This inventor holds 5 USPTO granted patents. Top assignees: Hitachi, Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited. Active years: 1995-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazushi Tomita. Retrieved from https://idiyas.com/inventor/kazushi-tomita

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 9.9

ph-index = 5

Forward Citations = 149(Granted Patents)


Company Filing History:


Years Active: 1995-1999

Loading Chart...
5 patents (USPTO):Explore Patents

Title: **The Innovative Mind of Kazushi Tomita**

Introduction

Kazushi Tomita, an accomplished inventor based in Kawaguchi, Japan, is recognized for his contributions to semiconductor technology. With a total of five patents to his name, Tomita has made significant advancements in the field, particularly in the design and fabrication of integrated circuit devices and plasma etching techniques.

Latest Patents

Among his latest innovations, Tomita's patents include a semiconductor integrated circuit device featuring a capacitance element. This invention embodies a Static Random Access Memory (SRAM) design, where memory cells integrate transfer Metal Insulator Semiconductor Field-Effect Transistors (MISFETs) controlled by word lines. Notably, the flip-flop circuit encompasses driver MISFETs and load MISFETs, with large-area plate electrodes strategically arranged over the load MISFETs, incorporating an opening over the offset regions. Furthermore, a silicon nitride film that permits hydrogen ingress while blocking humidity is applied over the transfer MISFETs and driver MISFETs, enhancing the device's functionality.

Another groundbreaking patent involves an anisotropic etching method and apparatus. This invention features a parallel-plate plasma etching apparatus, comprising a susceptor electrode and a shower electrode. A semiconductor wafer is positioned on the susceptor electrode, while various process gas supply holes define the shower region in the shower electrode. With a cooling block ensuring a temperature gradient, the apparatus achieves a balance of etching anisotropy across the wafer, enhancing manufacturing efficiency.

Career Highlights

Kazushi Tomita has spent a significant portion of his career at esteemed companies, including Hitachi, Ltd. and Tokyo Electron Limited. His work at these institutions has been instrumental in developing technologies that push the envelope in semiconductor manufacturing and design.

Collaborations

Throughout his career, Tomita has worked alongside notable colleagues such as Yoshikazu Ito and Shunichi Iimuro. Their collective expertise has fostered innovative approaches in their projects, contributing to the remarkable advancements in their respective fields.

Conclusion

Kazushi Tomita's dedication to innovation and his impactful patents have established him as a leading inventor in the semiconductor industry. His work continues to inspire future developments, ensuring that technology evolves to meet the ever-growing demands of the digital age.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…