Kawasaki, Japan

Kazumichi Tsumura

This inventor holds 17 USPTO granted patents and 11 published patent applications, primarily in Semiconductor Devices. Top assignees: Kabushiki Kaisha Toshiba, International Business Machines Corporation, Toshiba America Electronic Components, Inc.. Active years: 2006-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazumichi Tsumura. Retrieved from https://idiyas.com/inventor/kazumichi-tsumura

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 17 

% Patents Active = 35.3

Average Co-Inventor Count = 2.4

ph-index = 5

Forward Citations = 214(Granted Patents)


Location History:

  • Kanagawa, JP (2010 - 2011)
  • Kawasaki, JP (2006 - 2013)
  • Guilderland, NY (US) (2013 - 2014)
  • Ooita, JP (2014)
  • Oita, JP (2015)
  • Kanagawa-ken, JP (2015)
  • Shinagawa Tokyo, JP (2018)

Company Filing History:


Years Active: 2006-2018

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Areas of Expertise:
Semiconductor Memory Device
Dynamic Random Access Memory
Interconnect Structure
Through Hole Vias
Copper Interconnect
Bonding Method
Manufacturing Method
Aerial Wiring
Device Substrate
Supporting Substrate
Mn-group VIIIB Alloy
Capacitor
17 patents (USPTO):Explore Patents

Title: **Kazumichi Tsumura: Innovator in Semiconductor Technologies**

Introduction

Kazumichi Tsumura is a remarkable inventor based in Kawasaki, Japan, who has made significant contributions to the semiconductor industry. With a portfolio of 17 patents, he demonstrates a deep commitment to advancing technology and improving device functionality.

Latest Patents

Among his latest innovations, Tsumura has developed a novel semiconductor memory device. This device features a first memory cell array layer with a region where memory cells are arranged in a three-dimensional format, complemented by wiring layers that connect effectively to these cells. Additionally, Tsumura has conceptualized a method of bonding a supporting substrate with a device substrate, which is pivotal for the fabrication of semiconductor devices. This method encompasses three key steps: providing a mitigation layer on the supporting substrate, bonding the device substrate to this layer, and then thinning the device substrate through grinding. Such technologies strive to enhance the performance and reliability of semiconductor devices.

Career Highlights

Kazumichi Tsumura has held positions in renowned companies, notably at Kabushiki Kaisha Toshiba and International Business Machines Corporation (IBM). His experience at these leading firms has undeniably influenced his innovative capabilities and his approach towards technology development.

Collaborations

Throughout his career, Tsumura has collaborated with esteemed colleagues like Takamasa Usui and Kazuyuki Higashi. These partnerships have likely fostered an environment of creativity and innovation, contributing to the advancement of semiconductor technologies.

Conclusion

With 17 patents under his name, Kazumichi Tsumura stands out as a pivotal figure in the semiconductor field. His contributions not only reflect his ingenuity as an inventor but also underline the importance of collaboration in driving technological advancements. As the semiconductor industry continues to evolve, Tsumura's innovations are sure to leave a lasting impact.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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