Fujimi, Japan

Kazumasa Hasegawa

This inventor holds 25 USPTO granted patents and 1 EPO patent, primarily in Ferroelectric Memory. Top assignee: Seiko Epson Corporation. Active years: 1996-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kazumasa Hasegawa. Retrieved from https://idiyas.com/inventor/kazumasa-hasegawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 60.0


Average Co-Inventor Count = 2.6

ph-index = 10

Forward Citations = 418(Granted Patents)


Location History:

  • Suwa, JP (1996 - 2004)
  • Nagano, JP (1998 - 2005)
  • Nagano-ken, JP (2001 - 2007)
  • Fujimi-cho, JP (2003 - 2007)
  • Fujimi-machi, JP (2005 - 2007)
  • Fujimi, JP (2007)

Company Filing History:


Years Active: 1996-2007

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Areas of Expertise:
Ferroelectric Memory
Piezoelectric Transducer
Memory Cell Array
Electrophoretic Ink Display
Inkjet Printing
Liquid Jet Recording
Semiconductor Memory
Manufacturing Method
Memory Device
Capacitors
Liquid Spray Head
Production Method
25 patents (USPTO):Explore Patents

Title: Celebrating the Innovations of Kazumasa Hasegawa: A Pioneer in Semiconductor Technology

Introduction: Kazumasa Hasegawa, based in Fujimi-cho, Japan, is a distinguished inventor known for his significant contributions to semiconductor technology. With a remarkable portfolio of 25 patents, his work has paved the way for advancements in memory devices, particularly in the realm of ferroelectric materials.

Latest Patents: Among his latest inventions are a semiconductor memory device and a method for manufacturing it. This device features a substrate with a semiconductor element, an interlayer dielectric layer, and a plug within that layer. It also includes an adhesion layer above the plug and a ferroelectric capacitor, which encompasses a lower electrode, a ferroelectric layer, and an upper electrode. Notably, an oxidized layer is created at the sidewall of the adhesion layer.

Another significant patent of Hasegawa is the crosspoint-type ferroelectric memory. This innovative design involves stacking two memory cell arrays separated by interlayer insulating layers. The arrays consist of lower and upper electrodes aligned in a crossed configuration, with ferroelectric capacitors strategically placed at their intersections. An embedded insulating layer is also part of this architecture, which includes a conductive layer sandwiched between two insulating layers.

Career Highlights: Hasegawa's work at Seiko Epson Corporation has established him as a leader in semiconductor research and development. His patents reflect his expertise and innovative thinking, particularly in the fields of memory technology and material science.

Collaborations: Throughout his career, Hasegawa has collaborated with talented individuals such as Eiji Natori and Tatsuya Shimoda. Together, they have contributed to groundbreaking research that has impacted both the academic and industrial landscapes.

Conclusion: Kazumasa Hasegawa's innovative spirit continues to drive advancements in semiconductor technology. His extensive patent portfolio not only highlights his creativity but also his commitment to enhancing the capabilities of electronic devices. As technology continues to evolve, Hasegawa's contributions remain a significant part of the journey towards more efficient and powerful memory solutions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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