Tokyo, Japan

Kan Shimizu

This inventor holds 28 USPTO granted patents and 7 published patent applications, primarily in Semiconductor Devices. Top assignees: Kabushiki Kaisha Toshiba, Sony Corporation, Sony Semiconductor Solutions Corporation. Active years: 1995-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kan Shimizu. Retrieved from https://idiyas.com/inventor/kan-shimizu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 28 

% Patents Active = 89.3

Average Co-Inventor Count = 1.7

ph-index = 6

Forward Citations = 163(Granted Patents)


Location History:

  • Urawa, JP (1995 - 2002)
  • Saitama, JP (2004 - 2020)
  • Kumamoto, JP (2016 - 2021)
  • Tokyo, JP (2001 - 2022)
  • Kanagawa, JP (2021 - 2023)

Company Filing History:


Years Active: 1995-2026

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Areas of Expertise:
Imaging Element
Semiconductor Chip
Solid-State Imaging
Charge Detection Sensor
Light Emitting Element
Display Device
CMOS Bias Circuit
Voltage Regulator Circuit
Analog/Digital Converter
Flat-Panel Display
Picture Control Device
Signal Line Driving Circuit
28 patents (USPTO):Explore Patents

Title: Kan Shimizu: Pioneering Innovations in Semiconductor Technology

Introduction

Kan Shimizu, an accomplished inventor based in Tokyo, Japan, has made significant contributions to the field of semiconductor technology. With an impressive portfolio of 25 patents, Shimizu's work reflects a commitment to enhancing the performance and sensitivity of electronic devices through innovative designs.

Latest Patents

Among his latest innovations are two notable patents that showcase his expertise. The first patent revolves around a charge detection sensor and potential measurement system designed to achieve decreased noise and improved sensitivity by reducing parasitic capacitance. This sensor is composed of a detection element situated on one side of a semiconductor substrate, which is responsible for detecting charges. Meanwhile, a detection electrode is located on the opposite surface, and a contact connects these components through the substrate. This design minimizes parasitic capacitance by eliminating any wiring layers between the detection element and the detection electrode.

Shimizu's second latest patent focuses on a semiconductor device and its manufacturing method, particularly an imaging device that features a first semiconductor element with concave-shaped bump pads. These pads contain multiple metal layers and connect to a second semiconductor element equipped with electrodes through microbumps. The innovative design improves the functionality of pixel units in imaging devices, allowing for more precise electronic interactions.

Career Highlights

Shimizu's notable career includes key positions at prominent companies, such as Kabushiki Kaisha Toshiba and Sony Corporation. His experience in these leading firms has allowed him to hone his skills in semiconductor research and development, contributing to numerous advancements in technology.

Collaborations

Throughout his career, Shimizu has collaborated with esteemed professionals, including Satoru Wakiyama and Naoki Jyo. These partnerships have fostered a rich environment for innovation, enabling them to push the boundaries of semiconductor design and functionality.

Conclusion

Kan Shimizu stands out as a leading inventor in the semiconductor industry, with a remarkable ability to create solutions that address critical challenges in electronic device performance. His latest patents not only reflect his expertise but also pave the way for future advancements in technology. As the industry evolves, Shimizu's innovative spirit and contributions will undoubtedly continue to leave a lasting impact.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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