Scarborough, ME, United States of America

Jun Cai

This inventor holds 59 USPTO granted patents and 1 published patent application, primarily in LDMOS Technology (CPC class H01L). Top assignees: Fairchild Semiconductor Corporation, Chartered Semiconductor Manufacturing Ltd (Corporation), Nano Silicon Pte. Ltd.. Active years: 2001-2023.

USPTO Granted Patents = 59 (Patent Applications = 1)

% Patents Active = 83.1

Average Co-Inventor Count = 1.6

ph-index = 10

Forward Citations = 454(Granted Patents)

Forward Citations (Not Self Cited) = 431(Dec 10, 2025)

Inventors with similar research interests:

Location History:

Portland, ME (US) (2004 - 2007)
Scarborough, MA (US) (2018)
Scarborough, ME (US) (2005 - 2020)
Shugart, SG (2020)
Singapore, SG (2001 - 2023)

Company Filing History:

33 out of 1,302

Fairchild Semiconductor Corporation

patents

7 out of 962

Chartered Semiconductor Manufacturing Ltd (Corporation)

patents

6 out of 9

Nano Silicon Pte. Ltd.

patents

4. 6 out of 42,711

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

5. 5 out of 8,742

Seagate Technology Incorporated

patents

6. 2 out of 80

Institute of Microelectronics

patents

Years Active: 2001-2023

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Areas of Expertise:

Lateral DMOS

High-Voltage Diodes

Hybrid-Mode LDMOS

Integrated Circuit

Error Detection Codes

Data Storage

Localized Carrier Lifetime

CMOS Devices

Silicided NMOS

Electrostatic Discharge

Low Leakage Diode

Resource Allocation

59 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11592984 - Onboard machine learning for storage device (2023-02-28),

2. 11295778 - Resource allocation for multi-actuator storage device (2022-04-05),

3. 10755742 - Fragmented data storage bands (2020-08-25),

4. 10727334 - Lateral DMOS device with dummy gate (2020-07-28),

5. 10453955 - Lateral DMOS device with dummy gate (2019-10-22),

6. 10381259 - Semiconductor device with localized carrier lifetime reduction and fabrication method thereof (2019-08-13),

7. 10073735 - Seeding mechanism for error detection codes (2018-09-11),

8. 9871133 - Lateral DMOS device with dummy gate (2018-01-16),

9. 9698044 - Localized carrier lifetime reduction (2017-07-04),

10. 9678864 - Data reallocation upon detection of errors (2017-06-13),

11. 9450056 - Lateral DMOS device with dummy gate (2016-09-20),

12. 8912598 - Stepped-source LDMOS architecture (2014-12-16),

13. 8823051 - High-voltage diodes formed in advanced power integrated circuit devices (2014-09-02),

14. 8362557 - Stepped-source LDMOS architecture (2013-01-29),

15. 8349717 - High voltage LDMOS (2013-01-08),

Title: The Innovative Journey of Jun Cai

Introduction: Jun Cai, a talented inventor based in Scarborough, ME, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Jun Cai holds several patents in the areas of artificial intelligence, renewable energy, and sustainable technologies, showcasing his diverse range of expertise and forward-thinking approach.

Career Highlights: With a background in engineering and a passion for problem-solving, Jun Cai has led numerous successful projects that have revolutionized industries and improved the lives of many. His dedication to innovation is evident in the impact of his creations.

Collaborations: Jun Cai has collaborated with leading research institutions, universities, and tech companies to further his inventions and bring them to market. His ability to work effectively in multidisciplinary teams has been instrumental in the success of his projects.

Conclusion: Jun Cai's innovative spirit, coupled with his technical acumen, has solidified his reputation as a pioneering inventor in Scarborough, ME, and beyond. His relentless pursuit of excellence continues to inspire future generations of inventors and innovators.