The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 20, 2016
Filed:
Jan. 17, 2012
Chun-wai NG, Hsin-Chu, TW;
Ruey-hsin Liu, Hsin-Chu, TW;
Jun Cai, Scarborough, ME (US);
Hsueh-liang Chou, Jhubei, TW;
Chi-chih Chen, Hsin-Chu, TW;
Chun-Wai Ng, Hsin-Chu, TW;
Ruey-Hsin Liu, Hsin-Chu, TW;
Jun Cai, Scarborough, ME (US);
Hsueh-Liang Chou, Jhubei, TW;
Chi-Chih Chen, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
An LDMOS transistor with a dummy gate comprises an extended drift region formed over a substrate, a drain region formed in the extended drift region, a channel region formed in the extended drift region, a source region formed in the channel region and a dielectric layer formed over the extended drift region. The LDMOS transistor with a dummy gate further comprises an active gate formed over the channel region and a dummy gate formed over the extended drift region. The dummy gate helps to reduce the gate charge of the LDMOS transistor while maintaining the breakdown voltage of the LDMOS transistor.