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For the Inventor, By the Inventor

Marseille, France

Julien Delalleau

This inventor holds 33 USPTO granted patents and 9 published patent applications and 2 EPO patents, primarily in Integrated Circuits. Top assignees: Stmicroelectronics (Rousset) Sas, Universite Aix-Marseille 1 Provence. Active years: 2013-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Julien Delalleau. Retrieved from https://idiyas.com/inventor/julien-delalleau

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33 

% Patents Active = 97.0

 

Average Co-Inventor Count = 2.3

ph-index = 4

Forward Citations = 44(Granted Patents)


Location History:

  • Aix en Provence, FR (2013 - 2018)
  • Marseille, FR (2018)
  • Marseilles, FR (2018 - 2024)

Company Filing History:

goldMedal33 out of 1,023 
 
Stmicroelectronics (Rousset) Sas
 patents
silverMedal2 out of 2 
 
Universite Aix-Marseille 1 Provence
 patents
where one patent can have more than one assignee

Years Active: 2013-2024

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Areas of Expertise:
Integrated Circuit
Non-Volatile Memory
MOSFET Transistor
Vertical Memory Cell
Transistor Design
Compact Memory Device
Decoy Structure
Electrical Energy Generation
Hot-Carrier Injection
Memory Cell
Vertical Transistor
Control Gates
33 patents (USPTO):Explore Patents
1. 12057513 - Integrated circuit including a capacitive element and corresponding manufacturing method (2024-08-06),
2. 12051656 - Integrated circuit containing a decoy structure (2024-07-30),
3. 11943931 - Non-volatile memory device with vertical state transistor and vertical selection transistor (2024-03-26),
4. 11721773 - Integrated circuit including a capacitive element and corresponding manufacturing method (2023-08-08),
5. 11581270 - Integrated circuit containing a decoy structure (2023-02-14),
6. 11424342 - Fabrication process comprising an operation of defining an effective channel length for MOSFET transistors (2022-08-23),
7. 11387194 - Method for detecting an attempt to breach the integrity of a semiconductor substrate of an integrated circuit from its back face, and corresponding integrated circuit (2022-07-12),
8. 11270886 - Transistor comprising a lengthened gate (2022-03-08),
9. 10991710 - Non-volatile memory device with vertical state transistor and vertical selection transistor (2021-04-27),
10. 10930351 - Compact non-volatile memory device (2021-02-23),
11. 10804222 - Integrated circuit containing a decoy structure formed by an electrically insulated silicide sector (2020-10-13),
12. 10797158 - Transistor comprising a lengthened gate (2020-10-06),
13. 10763213 - Integrated circuit having a hidden shared contact (2020-09-01),
14. 10714583 - MOS transistor with reduced hump effect (2020-07-14),
15. 10686046 - Memory cell comprising non-self-aligned horizontal and vertical control gates (2020-06-16),

Title: Innovations from Julien Delalleau: A Pioneering Inventor from Marseilles

Introduction

Julien Delalleau, an accomplished inventor based in Marseilles, France, has made significant contributions to the field of integrated circuits, holding an impressive total of 33 patents. His innovative work focuses on advanced semiconductor technologies, pushing the boundaries of what is possible in electronic design and manufacturing.

Latest Patents

Among his latest patents, Delalleau has developed a remarkable integrated circuit that features a capacitive element and an associated manufacturing method. This technology involves a semiconductor substrate with excavated trenches that allow for enhanced functionality. The capacitive component consists of multiple dielectric envelopes and semiconductor layers that conform to the structure of the trenches, enhancing capacitive performance and integration.

Another noteworthy patent includes an integrated circuit containing a decoy structure. This design optimizes circuit performance by incorporating a subsector within an isolating region, which electrically isolates a silicided sector from the substrate. This innovation showcases Delalleau's ability to innovate within complex electronic environments.

Career Highlights

Julien Delalleau's professional journey has seen him contribute his expertise to prominent organizations. He has held positions at STMicroelectronics in Rousset and the Université Aix-Marseille 1 Provence, where he has engaged in cutting-edge research and development in semiconductor technologies. His work has been pivotal in advancing integrated circuit design.

Collaborations

Delalleau has collaborated with esteemed colleagues in the field, including Christian Rivero and Francesco La Rosa. These partnerships have fostered an environment of creativity and innovation, leading to the development of groundbreaking technologies that are shaping the future of electronic systems.

Conclusion

Julien Delalleau's contributions to the field of integrated circuits are characterized by his inventive spirit and commitment to advancing semiconductor technologies. With 33 patents to his name and innovative designs that address contemporary challenges in electronics, Delalleau remains a key figure in the landscape of modern invention. His work continues to inspire future generations of inventors and engineers in the pursuit of technological excellence.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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