The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2020

Filed:

Jul. 17, 2018
Applicant:

Stmicroelectronics (Rousset) Sas, Rousset, FR;

Inventors:

Christian Rivero, Rousset, FR;

Guilhem Bouton, Peynier, FR;

Pascal Fornara, Pourrieres, FR;

Julien Delalleau, Marseilles, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 21/28 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4238 (2013.01); H01L 21/28035 (2013.01); H01L 21/28114 (2013.01); H01L 21/823437 (2013.01); H01L 21/823481 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/42356 (2013.01); H01L 29/42376 (2013.01); H01L 29/4983 (2013.01); H01L 29/78 (2013.01); H01L 29/7833 (2013.01);
Abstract

A MOS transistor is produced on and in an active zone which includes a source region and a drain region. The active zone is surrounded by an insulating region. A conductive gate region of the transistor has two flanks which extend transversely to a source-drain direction, and the conductive gate region overlaps two opposite edges of the active zone act overlap zones. The conductive gate region includes, at a location of at least one overlap zone, at least one conductive tag which projects from at least one flank at a foot of the conductive gate region. The conductive tag covers a part of the active zone and a part of the insulating region.


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