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For the Inventor, By the Inventor

Singapore, Singapore

Jose Alvin Caparas

This inventor holds 48 USPTO granted patents, primarily in Integrated Circuit Packaging. Top assignees: Stats Chippac Pte. Ltd., St Assembly Test Services Inc., Jcet Semiconductor (Shaoxing) Co., Ltd.. Active years: 2006-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jose Alvin Caparas. Retrieved from https://idiyas.com/inventor/jose-alvin-caparas

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 48

% Patents Active = 95.8

Average Co-Inventor Count = 4.0

ph-index = 12

Forward Citations = 302(Granted Patents)


Company Filing History:

goldMedal41 out of 1,843 
 
Stats Chippac Pte. Ltd.
 patents
silverMedal5 out of 103 
 
St Assembly Test Services Inc.
 patents
bronzeMedal2 out of 15 
 
Jcet Semiconductor (Shaoxing) Co., Ltd.
 patents

Years Active: 2006-2021

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Areas of Expertise:
Integrated Circuit
Packaging
TSV Interconnects
Wirebondless
Encapsulation
Fan-Out Wafer Level Package
Molded Laser Package
Thermal Management
Electrical Dielectric
Stress Relief
Stacked Structures
ESD Protection
48 patents (USPTO):Explore Patents
1. 11127668 - Semiconductor device and method of forming double-sided fan-out wafer level package (2021-09-21),
2. 10622293 - Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLB-MLP) (2020-04-14),
3. 10453785 - Semiconductor device and method of forming double-sided fan-out wafer level package (2019-10-22),
4. 10446523 - Semiconductor device and method of forming wire studs as vertical interconnect in FO-WLP (2019-10-15),
5. 10297556 - Semiconductor device and method of controlling warpage in reconstituted wafer (2019-05-21),
6. 10163747 - Semiconductor device and method of controlling warpage in reconstituted wafer (2018-12-25),
7. 9607965 - Semiconductor device and method of controlling warpage in reconstituted wafer (2017-03-28),
8. 9443797 - Semiconductor device having wire studs as vertical interconnect in FO-WLP (2016-09-13),
9. 9293401 - Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLP-MLP) (2016-03-22),
10. 9281259 - Semiconductor device and method of forming thick encapsulant for stiffness with recesses for stress relief in FO-WLCSP (2016-03-08),
11. 9153544 - Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die (2015-10-06),
12. 9142428 - Semiconductor device and method of forming FO-WLCSP with multiple encapsulants (2015-09-22),
13. 9076737 - Integrated circuit packaging system with bumps and method of manufacture thereof (2015-07-07),
14. 9059157 - Integrated circuit packaging system with substrate and method of manufacture thereof (2015-06-16),
15. 9054083 - Semiconductor device and method of making TSV interconnect structures using encapsulant for structural support (2015-06-09),

Title: Jose Alvin Caparas: Pioneering Inventor from Singapore

Introduction: Jose Alvin Caparas is a distinguished inventor hailing from the vibrant city-state of Singapore. With a passion for innovation and a keen eye for problem-solving, Caparas has made significant contributions to the field of technology through his groundbreaking inventions.

Latest Patents: Caparas holds several patents in the areas of artificial intelligence, renewable energy, and sustainable urban development. His most recent patent involves a cutting-edge AI algorithm designed to optimize energy consumption in smart cities.

Career Highlights: Throughout his illustrious career, Caparas has worked with leading tech companies and research institutions to bring his innovative ideas to life. He has been recognized for his exceptional creativity and technical expertise, earning him a reputation as a trailblazer in the industry.

Collaborations: Caparas has collaborated with top engineers, scientists, and designers on various projects, fostering a culture of innovation and collaboration. His ability to work across disciplines and bring diverse perspectives to the table has been instrumental in the success of his inventions.

Conclusion: Jose Alvin Caparas continues to push the boundaries of technology and inspire the next generation of inventors with his groundbreaking work. His dedication to creating a more sustainable and efficient world through innovation serves as a testament to his visionary spirit and unwavering commitment to excellence.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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