South Burlington, VT, United States of America

Jonathan R Fales

This inventor holds 9 USPTO granted patents. Top assignees: Cadence Design Systems, Inc., International Business Machines Corporation. Active years: 2007-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jonathan R Fales. Retrieved from https://idiyas.com/inventor/jonathan-r-fales

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 55.6

Average Co-Inventor Count = 2.7

ph-index = 2

Forward Citations = 16(Granted Patents)


Location History:

  • South Burlington, VT (US) (2007 - 2012)
  • Finksburg, MD (US) (2020 - 2024)

Company Filing History:


Years Active: 2007-2024

Loading Chart...
9 patents (USPTO):Explore Patents

Title: The Innovative Journey of Jonathan R. Fales

Introduction

Jonathan R. Fales, based in South Burlington, Vermont, has made significant contributions to the field of electronic design with a robust portfolio of nine patents. His inventive work primarily revolves around the improvements in circuit design layout constructs, which play a crucial role in electronic design automation (EDA).

Latest Patents

Fales' latest patents showcase his innovative thinking and technical prowess. One of his notable inventions is the "Context-aware Circuit Design Layout Construct." This patent describes various embodiments that facilitate a context-aware approach to circuit design. It allows for the integration of programmable patterns into the layout of a circuit design, ensuring adaptability based on context information related to the placement within the overall design.

Another significant patent is the method and system for "Relative Placement by Application of Layered Abstractions." This invention outlines a systematic approach for the relative placement of components within circuit layouts. By utilizing data structures that include the locations and characteristics of components, Fales' method effectively enables the scaling and positioning of component groups in a new circuit design based on their original placement.

Career Highlights

Throughout his career, Jonathan Fales has held prominent positions at leading companies in the technology sector, including Cadence Design Systems, Inc. and IBM. His work at these companies has contributed to advancing electronic design methodologies, making him a recognized figure in the industry.

Collaborations

Fales has collaborated with notable professionals in the field, including Joshua David Tygert and Rwik Sengupta. These collaborations have underscored the value of teamwork and knowledge-sharing in fostering innovation and achieving breakthroughs in circuit design.

Conclusion

Jonathan R. Fales exemplifies the spirit of innovation in electronic design. With an impressive array of patents and a career marked by significant contributions to major technology firms, he continues to shape the future of circuit design through his inventive solutions. His work not only enhances existing methodologies but also paves the way for future advancements in electronic design automation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…