San Jose, CA, United States of America

Jeong-Seok Na

This inventor holds 9 USPTO granted patents and 7 published patent applications. Top assignees: Lam Research Corporation, Novellus Systems Incorporated. Active years: 2016-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeong-Seok Na. Retrieved from https://idiyas.com/inventor/jeong-seok-na

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 9 

% Patents Active = 100.0

Average Co-Inventor Count = 3.5

ph-index = 6

Forward Citations = 116(Granted Patents)


Location History:

  • Fremont, CA (US) (2019)
  • San Jose, CA (US) (2016 - 2020)

Company Filing History:


Years Active: 2016-2025

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9 patents (USPTO):Explore Patents

Title: The Innovations of Jeong-Seok Na

Introduction

Jeong-Seok Na is a prominent inventor based in San Jose, CA, known for his significant contributions to the field of materials science and semiconductor technology. With a total of 9 patents to his name, he has made remarkable advancements in deposition methods that enhance the performance and reliability of electronic devices.

Latest Patents

One of his latest patents focuses on molybdenum deposition. This innovation provides methods for filling patterned features with molybdenum (Mo). The techniques involve selective deposition of Mo films on bottom metal-containing surfaces of a feature, which includes dielectric sidewalls. The selective growth of Mo on the bottom surface allows for bottom-up growth and ensures high quality, void-free fill. Additionally, he has developed related apparatus to support this process. Another notable patent involves depositing ruthenium layers in interconnect metallization. In this case, the deposition processes for ruthenium (Ru) feature fill include the application of a thin, protective Ru film under reducing conditions, followed by a Ru fill step under oxidizing conditions. The presence of protective Ru films formed under oxygen-free conditions can enable Ru fill without oxidation of an underlying adhesion layer or metal feature.

Career Highlights

Throughout his career, Jeong-Seok Na has worked with leading companies in the semiconductor industry, including Lam Research Corporation and Novellus Systems Incorporated. His work has significantly impacted the development of advanced materials and processes used in modern electronics.

Collaborations

Jeong-Seok Na has collaborated with several talented individuals in his field, including Chiukin Steven Lai and Raashina Humayun. These collaborations have fostered innovation and contributed to the success of various projects.

Conclusion

Jeong-Seok Na's contributions to the field of semiconductor technology through his innovative patents and collaborations highlight his role as a key inventor in advancing electronic materials. His work continues to influence the industry and pave the way for future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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