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For the Inventor, By the Inventor

Essex Junction, VT, United States of America

Jason Michael Norman

USPTO Granted Patents = 18 

Average Co-Inventor Count = 4.4

ph-index = 5

Forward Citations = 76(Granted Patents)


Location History:

  • So. Burlington, VT (US) (2006)
  • South Burlington, VT (US) (2005 - 2007)
  • Essex Junction, VT (US) (2007 - 2013)

Company Filing History:

goldMedal18 out of 164,108 
 
International Business Machines Corporation
 patents

Years Active: 2005-2013

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18 patents (USPTO):
1. 8539404 - Functional simulation redundancy reduction by state comparison and pruning (2013-09-17),
2. 8347019 - Structure for hardware assisted bus state transition circuit using content addressable memories (2013-01-01),
3. 7898286 - Critical path redundant logic for mitigation of hardware across chip variation (2011-03-01),
4. 7865789 - System and method for system-on-chip interconnect verification (2011-01-04),
5. 7823107 - Transition balancing for noise reduction/Di/Dt reduction during design, synthesis, and physical design (2010-10-26),
6. 7743270 - Assigning clock arrival time for noise reduction (2010-06-22),
7. 7643591 - Transition balancing for noise reduction /Di/Dt reduction during design, synthesis, and physical design (2010-01-05),
8. 7519941 - Method of manufacturing integrated circuits using pre-made and pre-qualified exposure masks for selected blocks of circuitry (2009-04-14),
9. 7313738 - System and method for system-on-chip interconnect verification (2007-12-25),
10. 7308663 - Circuit design verification using checkpointing (2007-12-11),
11. 7286770 - Fiber optic transmission lines on an SOC (2007-10-23),
12. 7275011 - Method and apparatus for monitoring integrated circuit temperature through deterministic path delays (2007-09-25),
13. 7248838 - Wireless communication system within a system on a chip (2007-07-24),
14. 7139881 - Semiconductor device comprising a plurality of memory structures (2006-11-21),
15. 7103320 - Wireless communication system within a system on a chip (2006-09-05),

Certainly! Here is the article about inventor Jason Michael Norman:

Title: Jason Michael Norman - Pioneering Innovations in Integrated Circuit Design

Introduction:

Jason Michael Norman, a highly skilled inventor based in Essex Junction, VT (US), has made significant contributions to the field of integrated circuit design. With an impressive portfolio of 18 patents, Jason is known for his groundbreaking work in functional simulation redundancy reduction and hardware-assisted bus state transition circuits.

Latest Patents:

Jason's latest patents showcase his ingenuity and expertise in the realm of integrated circuit design. "Functional simulation redundancy reduction by state comparison and pruning" introduces methods and systems that optimize simulation processes for integrated circuit designs. Meanwhile, "Structure for hardware assisted bus state transition circuit using content addressable memories" presents a novel design structure that enhances the efficiency of integrated circuits.

Career Highlights:

Jason Michael Norman is a key figure at International Business Machines Corporation (IBM), where he plays a pivotal role in driving innovation and technological advancements. His collaborative efforts within IBM have led to the development of cutting-edge solutions that push the boundaries of integrated circuit design.

Collaborations:

Jason's collaborative spirit is evident in his work with esteemed colleagues such as Sebastian Theodore Ventrone and Kenneth Joseph Goodnow. Together, they have shared insights, expertise, and innovative ideas to create groundbreaking technologies in the field of integrated circuits.

Conclusion:

In conclusion, Jason Michael Norman stands as a pioneering inventor in the realm of integrated circuit design. His remarkable patents, illustrious career at IBM, and successful collaborations underscore his profound impact on the technological landscape. Jason's dedication to innovation continues to inspire and shape the future of integrated circuit design.

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