The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2011
Filed:
Jun. 28, 2007
Serafino Bueti, Waterbury, VT (US);
Adam Courchesne, Belchertown, MA (US);
Kenneth J. Goodnow, Essex Junction, VT (US);
Gregory J. Mann, Winfield, IL (US);
Jason M. Norman, Essex Junction, VT (US);
Stanley B. Stanski, Essex Junction, VT (US);
Scott T. Vento, Essex Junction, VT (US);
Serafino Bueti, Waterbury, VT (US);
Adam Courchesne, Belchertown, MA (US);
Kenneth J. Goodnow, Essex Junction, VT (US);
Gregory J. Mann, Winfield, IL (US);
Jason M. Norman, Essex Junction, VT (US);
Stanley B. Stanski, Essex Junction, VT (US);
Scott T. Vento, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for verifying system-on-chip interconnect includes a first linear feedback shift register coupled to an output interface of a first system-on-chip component, a second linear feedback shift register instantiated in a second system-on-chip component, and a comparator coupled to the second linear feedback shift register and the input interface of the second system-on-chip. Another method for verifying includes generating a pseudo-random number sequence with the first linear feedback shift register and the second linear feedback shift register using an identical first initial state, and comparing an output of the first linear feedback shift register with an output of the second linear feedback shift register and reporting a miss-compare.