The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2010
Filed:
Sep. 11, 2006
Igor Arsovski, Williston, VT (US);
Joseph A. Iadanza, Hinesburg, VT (US);
Jason M. Norman, Essex Junction, VT (US);
Sebastian T. Ventrone, South Burlington, VT (US);
Igor Arsovski, Williston, VT (US);
Joseph A. Iadanza, Hinesburg, VT (US);
Jason M. Norman, Essex Junction, VT (US);
Sebastian T. Ventrone, South Burlington, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, system and computer program product reducing clock noise generated by clock signals in an integrated circuit (IC) are disclosed. Conventional IC design attempts to ensure coincident clock active edge arrival times for all clocked elements. The coincident active clock edges generate coincident noise currents, which elevates the total noise current. The current invention assigns clock arrival times for clocked elements of an IC based on a desired clock arrival time distribution such that active clock edges are not coincident. As a consequence, the total noise would be spread over a large portion of the clock cycle, thus reducing the noise magnitude substantially.