Janmye Sung

This inventor holds 18 USPTO granted patents, primarily in DRAM Fabrication. Top assignees: Vanguard International Semiconductor Corporation, Etron Technology, Inc.. Active years: 1996-2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Janmye Sung. Retrieved from https://idiyas.com/inventor/janmye-sung

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 18

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 11

Forward Citations = 536(Granted Patents)

Location History:

Tauyuan, TW (1996 - 1998)
Yang-Mei, TW (1996 - 2000)
Hsinchu, TW (1998 - 2000)

Company Filing History:

18 out of 1,133

Vanguard International Semiconductor Corporation

patents

1 out of 305

Etron Technology, Inc.

patents

where one patent can have more than one assignee

Years Active: 1996-2000

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Areas of Expertise:

Capacitor Structure

Bit Line Fabrication

Dynamic Random Access Memory

Low Resistance

Self Aligned Contact

High Performance Logic

Memory Cell Array

Buried Reservoir Capacitor

CMOS Process

Embedded DRAM

Vertical Bipolar Transistor

Reduced Mask Process

18 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6163047 - Method of fabricating a self aligned contact for a capacitor over (2000-12-19),

2. 6137130 - Capacitor over bit line structure using a straight bit line shape (2000-10-24),

3. 6136643 - Method for fabricating capacitor-over-bit-line dynamic random access (2000-10-24),

4. 6025227 - Capacitor over bit line structure using a straight bit line shape (2000-02-15),

5. 6008085 - Design and a novel process for formation of DRAM bit line and capacitor (1999-12-28),

6. 6008084 - Method for fabricating low resistance bit line structures, along with (1999-12-28),

7. 5943581 - Method of fabricating a buried reservoir capacitor structure for (1999-08-24),

8. 5879986 - Method for fabrication of a one gigabit capacitor over bit line DRAM (1999-03-09),

9. 5858831 - Process for fabricating a high performance logic and embedded dram (1999-01-12),

10. 5821142 - Method for forming a capacitor with a multiple pillar structure (1998-10-13),

11. 5808335 - Reduced mask DRAM process (1998-09-15),

12. 5792680 - Method of forming a low cost DRAM cell with self aligned twin tub CMOS (1998-08-11),

13. 5789291 - Dram cell capacitor fabrication method (1998-08-04),

14. 5753551 - Memory cell array with a self-aligned, buried bit line (1998-05-19),

15. 5729056 - Low cycle time CMOS process (1998-03-17),

Title: Janmye Sung: Pioneering Inventor from Yang-Mei

Introduction: Janmye Sung is a distinguished inventor hailing from Yang-Mei, Taiwan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Janmye Sung holds several patents in the areas of electronics, renewable energy, and sustainable technologies, showcasing his commitment to creating solutions for a better future.

Career Highlights: With a career spanning over two decades, Janmye Sung has worked with leading tech companies, research institutions, and universities, where he has spearheaded projects that have revolutionized the industry.

Collaborations: Sung has collaborated with top engineers, scientists, and designers from around the world, fostering a culture of innovation and excellence in all his projects. His collaborative spirit has led to the development of cutting-edge technologies.

Conclusion: Janmye Sung's relentless pursuit of innovation and his passion for creating impactful solutions have solidified his position as a trailblazer in the world of inventions. His work continues to inspire the next generation of inventors and innovators worldwide.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]