The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 19, 1998
Filed:
Nov. 25, 1996
Applicant:
Inventor:
JanMye Sung, Yang-Mei, TW;
Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438253 ; 438244 ; 438564 ; 438675 ;
Abstract
A method for forming memory cells, featuring a bit line, embedded in an insulator filled, shallow trench, has been developed. Self-alignment of the buried bit line, to a source and drain region of a transfer gate transistor, is obtained via outdiffusion of a doped polysilicon layer, used as part of the buried bit line, composite layer.
Quick Actions:
Sung, JanMye. (1998). Memory cell array with a self-aligned, buried bit line (U.S. Patent No. 5753551). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5753551
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile