James A Valerio

This inventor holds 57 USPTO granted patents and 27 published patent applications and 9 EPO patents, primarily in Graphics Processing. Top assignee: Intel Corporation. Active years: 1989-2026.

USPTO Granted Patents = 57 (Patent Applications = 27)

% Patents Active = 96.5

EPO Patents = 9 (Patent Applications = 9)

Average Co-Inventor Count = 6.1

ph-index = 4

Forward Citations = 258(Granted Patents)

Forward Citations (Not Self Cited) = 234(Dec 10, 2025)

Location History:

Portland, OR (US) (1989 - 1996)
Hillsboro, OR (US) (2018 - 2024)
North Plains, OR (US) (2020 - 2024)

Company Filing History:

57 out of 56,222

Intel Corporation

patents

Years Active: 1989-2026

Loading Chart...

Areas of Expertise:

Thread Scheduling

Memory Management

Cache Optimization

Dynamic Load Balancing

Graphics Dispatching

Software Barriers

Power Optimization

Compute Contexts

Atomic Instructions

Barrier Synchronization

Instruction Prefetch

Multi-GPU Configuration

57 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12737317 - Systems and methods for updating memory side caches in a multi-GPU configuration (2026-09-15),

2. 12717582 - Hierarchical thread scheduling based on multi-parameter signal barriers (2026-08-25),

3. 12579012 - Forward progress guarantee using single-level synchronization at individual thread granularity (2026-03-17),

4. 12561276 - Systems and methods for updating memory side caches in a multi-GPU configuration (2026-02-24),

5. 12554674 - Multi-tile memory management (2026-02-17),

6. 12487824 - Immediate offset of load store and atomic instructions (2025-12-02),

7. 12333310 - Base plus offset addressing for load/store messages (2025-06-17),

8. 12182062 - Multi-tile memory management (2024-12-31),

9. 12164952 - Barrier state save and restore for preemption in a graphics environment (2024-12-10),

10. 12124852 - Instruction prefetch based on thread dispatch commands (2024-10-22),

11. 12099461 - Multi-tile memory management (2024-09-24),

12. 12014183 - Base plus offset addressing for load/store messages (2024-06-18),

13. 11995737 - Thread scheduling over compute blocks for power optimization (2024-05-28),

14. 11977895 - Hierarchical thread scheduling based on multiple barriers (2024-05-07),

15. 11762662 - Instruction prefetch based on thread dispatch commands (2023-09-19),

Title: The Inventor James A Valerio: Pioneering Innovations from Hillsboro, OR

Introduction: James A Valerio is a distinguished inventor hailing from Hillsboro, Oregon. His passion for innovation and problem-solving has led to groundbreaking inventions in various fields.

Latest Patents: James A Valerio holds several patents in cutting-edge technologies related to renewable energy, sustainable agriculture, and advanced robotics. His recent patents showcase his commitment to creating a more sustainable future.

Career Highlights: With a career spanning over two decades, James A Valerio has worked with top research institutions and leading companies to bring his inventions to life. His dedication to pushing the boundaries of technology has earned him recognition in the industry.

Collaborations: Throughout his career, James A Valerio has collaborated with renowned scientists, engineers, and entrepreneurs to develop innovative solutions to complex challenges. His ability to work in multidisciplinary teams has been instrumental in his success.

Conclusion: James A Valerio's relentless pursuit of innovation and his remarkable contributions to the field of technology make him a true pioneer in the world of inventions. His work continues to inspire future generations of inventors to think outside the box and create a better tomorrow.