The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2024
Filed:
Jun. 25, 2021
Intel Corporation, Santa Clara, CA (US);
Vasanth Ranganathan, El Dorado Hills, CA (US);
James Valerio, North Plains, OR (US);
Joydeep Ray, Folsom, CA (US);
Abhishek R. Appu, El Dorado Hills, CA (US);
Alan Curtis, El Dorado Hills, CA (US);
Prathamesh Raghunath Shinde, Folsom, CA (US);
Brandon Fliflet, El Dorado Hills, CA (US);
Ben J. Ashbaugh, Folsom, CA (US);
John Wiegert, Aloha, OR (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
An apparatus to facilitate barrier state save and restore for preemption in a graphics environment is disclosed. The apparatus includes processing resources to execute a plurality of execution threads that are comprised in a thread group (TG) and mid-thread preemption barrier save and restore hardware circuitry to: initiate an exception handling routine in response to a mid-thread preemption event, the exception handling routine to cause a barrier signaling event to be issued; receive indication of a valid designated thread status for a thread of a thread group (TG) in response to the barrier signaling event; and in response to receiving the indication of the valid designated thread status for the thread of the TG, cause, by the thread of the TG having the valid designated thread status, a barrier save routine and a barrier restore routine to be initiated for named barriers of the TG.