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Hsin-Chu Hsien, Taiwan

Jacson Liu

USPTO Granted Patents = 8

Average Co-Inventor Count = 1.4

ph-index = 4

Forward Citations = 25(Granted Patents)

Location History:

Hsinchu, TW (2001 - 2004)
Hsinchu Hsien, TW (2000 - 2006)

Company Filing History:

Mosel Vitelic Corporation

Years Active: 2000-2006

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8 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7045435 - Shallow trench isolation method for a semiconductor wafer (2006-05-16),

2. 6784115 - Method of simultaneously implementing differential gate oxide thickness using fluorine bearing impurities (2004-08-31),

3. 6346474 - Dual damascene process (2002-02-12),

4. 6319795 - Method for fabricating VLSI devices having trench isolation regions (2001-11-20),

5. 6245467 - Patterned mask and a deep trench capacitor formed thereby (2001-06-12),

6. 6218275 - Process for forming self-aligned contact of semiconductor device (2001-04-17),

7. 6218267 - Shallow trench isolation method of a semiconductor wafer (2001-04-17),

8. 6146997 - Method for forming self-aligned contact hole (2000-11-14),

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