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For the Inventor, By the Inventor

Gyeonggi-do, South Korea

Hyeoung-Won Seo

USPTO Granted Patents = 16

Average Co-Inventor Count = 3.8

ph-index = 5

Forward Citations = 76(Granted Patents)


Company Filing History:

goldMedal16 out of 131,214 
 
Samsung Electronics Co., Ltd.
 patents

Years Active: 2006-2015

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16 patents (USPTO):Explore Patents
1. 9224619 - Semiconductor device and fabricating method thereof (2015-12-29),
2. 8895400 - Methods of fabricating semiconductor devices having buried word line interconnects (2014-11-25),
3. 7952129 - Semiconductor devices having a vertical channel transistor (2011-05-31),
4. 7759198 - Method of forming semiconductor devices having a vertical channel transistor (2010-07-20),
5. 7749846 - Method of forming contact structure and method of fabricating semiconductor device using the same (2010-07-06),
6. 7696570 - Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same (2010-04-13),
7. 7659597 - Integrated circuit wire patterns including integral plug portions (2010-02-09),
8. 7524733 - Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same (2009-04-28),
9. 7491603 - Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same (2009-02-17),
10. 7429505 - Method of fabricating fin field effect transistor using isotropic etching technique (2008-09-30),
11. 7393769 - Transistor of a semiconductor device having a punchthrough protection layer and methods of forming the same (2008-07-01),
12. 7354827 - Transistor having asymmetric channel region, semiconductor device including the same, and method of fabricating semiconductor device including the same (2008-04-08),
13. 7300845 - Method of manufacturing recess type MOS transistor having a dual diode impurity layer structure (2007-11-27),
14. 7279774 - Bulk substrates in FinFETs with trench insulation surrounding FIN pairs having FINs separated by recess hole shallower than trench (2007-10-09),
15. 7221023 - Asymmetric source/drain transistor employing selective epitaxial growth (SEG) layer and method of fabricating same (2007-05-22),

Title: **The Innovative Journey of Hyeoung-Won Seo**

Introduction

Hyeoung-Won Seo, based in Gyeonggi-do, South Korea, is a renowned inventor in the field of semiconductor technology. With an impressive portfolio of 16 patents, Seo's contributions to the industry have made significant impacts and advancements in semiconductor devices.

Latest Patents

Seo's latest work includes groundbreaking patents such as the "Semiconductor device and fabricating method thereof." This invention features a substrate with a trench, a gate insulation layer, and buried gate electrodes that optimize device performance. Furthermore, he has developed methods for "fabricating semiconductor devices having buried word line interconnects," which allows for more efficient layouts in semiconductor substrates, enhancing device functionality in both cell and peripheral circuit regions.

Career Highlights

Seo's career is marked by his affiliation with Samsung Electronics Co., Ltd., where he has fueled innovation through his extensive research and development efforts. His technical expertise has positioned him as a leading figure in semiconductor advancements, focusing on improving device structure and performance.

Collaborations

Throughout his career, Seo has collaborated with esteemed colleagues such as Du-Heon Song and Jae-Man Yoon. These collaborations have fostered an environment of shared knowledge and innovation, collectively driving forward cutting-edge technologies within the semiconductor sector.

Conclusion

Hyeoung-Won Seo's commitment to innovation and excellence is evident through his numerous patents and collaborative efforts. As a pivotal figure in the semiconductor industry, his contributions continue to pave the way for future advancements, helping to shape the landscape of technology today.

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