Hyeon-Seag Kim

This inventor holds 29 USPTO granted patents, primarily in Semiconductor Technology. Top assignee: Advanced Micro Devices Corporation. Active years: 2002-2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hyeon-Seag Kim. Retrieved from https://idiyas.com/inventor/hyeon-seag-kim

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 29

% Patents Active = 58.6

Average Co-Inventor Count = 1.5

ph-index = 9

Forward Citations = 382(Granted Patents)

Company Filing History:

29 out of 13,168

Advanced Micro Devices Corporation

patents

Years Active: 2002-2006

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Areas of Expertise:

Semiconductor

Flash Memory

Device Reliability

High Density

MOSFET

Epitaxial Growth

Hot Carrier

Electrical Stress

Isolation Structures

Low Power Devices

Gate Insulator

Memory Cell

29 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7155359 - Determination of device failure characteristic (2006-12-26),

2. 6929963 - Semiconductor component and method of manufacture and monitoring (2005-08-16),

3. 6909293 - Space-saving test structures having improved capabilities (2005-06-21),

4. 6897476 - Test structure for determining electromigration and interlayer dielectric failure (2005-05-24),

5. 6873932 - Method and apparatus for predicting semiconductor device lifetime (2005-03-29),

6. 6861696 - Structure and method for a two-bit memory cell (2005-03-01),

7. 6856160 - Maximum VCC calculation method for hot carrier qualification (2005-02-15),

8. 6831451 - Method for adjusting a Weibull slope for variations in temperature and bias voltage (2004-12-14),

9. 6825684 - Hot carrier oxide qualification method (2004-11-30),

10. 6812514 - High density floating gate flash memory and fabrication processes therefor (2004-11-02),

11. 6806696 - Method for determining a Weibull slope having a bias voltage variation adjustment (2004-10-19),

12. 6784682 - Method of detecting shallow trench isolation corner thinning by electrical trapping (2004-08-31),

13. 6784061 - Process to improve the Vss line formation for high density flash memory and related structure associated therewith (2004-08-31),

14. 6762463 - MOSFET with SiGe source/drain regions and epitaxial gate dielectric (2004-07-13),

15. 6737876 - Method and system for determining an operating voltage using a source/drain to gate overlap induced scaling factor (2004-05-18),

Title: Inventor Hyeon-Seag Kim: Pioneering Innovations in San Jose

Introduction: Hyeon-Seag Kim is a visionary inventor based in San Jose, CA, known for her groundbreaking contributions to the field of technology and beyond. Her relentless pursuit of innovation has led to numerous patents and significant advancements in various industries.

Latest Patents: Hyeon-Seag Kim holds several recent patents in the areas of artificial intelligence, renewable energy, and medical devices, showcasing her diverse range of expertise and forward-thinking approach to problem-solving.

Career Highlights: With a career spanning over two decades, Hyeon-Seag Kim has worked with leading tech companies, research institutions, and universities to bring her ideas to life. Her ability to bridge the gap between theory and practical application has resulted in the successful commercialization of many of her inventions.

Collaborations: Throughout her career, Hyeon-Seag Kim has collaborated with top engineers, scientists, and designers to push the boundaries of what is possible. Her collaborative spirit and interdisciplinary approach have been instrumental in the success of many projects.

Conclusion: Hyeon-Seag Kim's passion for innovation, coupled with her dedication to making a positive impact on the world, sets her apart as a true trailblazer in the field of invention. Her work continues to inspire future generations of inventors to think boldly and create fearlessly.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]