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Hsien-Chin Lin

This inventor holds 29 USPTO granted patents, primarily in FinFET Technology. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2001-2025.

USPTO Granted Patents = 29

% Patents Active = 89.7

Average Co-Inventor Count = 4.6

ph-index = 8

Forward Citations = 209(Granted Patents)

Company Filing History:

29 out of 42,759

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

Years Active: 2001-2025

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Areas of Expertise:

FinFET

Transistor Spacing

Multiple Threshold Voltages

Doping

Integrated Semiconductor Structure

Metal Gate

Hybrid Gate Process

Ultra-Shallow Junction

CMOS

Channel Stop Ion Implantation

Nitrogen Implantation

Polysilicon Resistor

29 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12374542 - Cut metal gate process for reducing transistor spacing (2025-07-29),

2. 11948842 - Etch stop layer between substrate and isolation structure (2024-04-02),

3. 11721544 - Cut metal gate process for reducing transistor spacing (2023-08-08),

4. 11239072 - Cut metal gate process for reducing transistor spacing (2022-02-01),

5. 10991628 - Etch stop layer between substrate and isolation structure (2021-04-27),

6. 10978351 - Etch stop layer between substrate and isolation structure (2021-04-13),

7. 10868003 - Creating devices with multiple threshold voltages by cut-metal-gate process (2020-12-15),

8. 10651030 - Cut metal gate process for reducing transistor spacing (2020-05-12),

9. 10515856 - Method of making a FinFET, and FinFET formed by the method (2019-12-24),

10. 10461078 - Creating devices with multiple threshold voltage by cut-metal-gate process (2019-10-29),

11. 10319581 - Cut metal gate process for reducing transistor spacing (2019-06-11),

12. 10224245 - Method of making a finFET, and finFET formed by the method (2019-03-05),

13. 9659776 - Doping for FinFET (2017-05-23),

14. 9373704 - Multiple-gate semiconductor device and method (2016-06-21),

15. 9362404 - Doping for FinFET (2016-06-07),

Certainly! Here is the article about inventor Hsien-Chin Lin:

Title: Hsien-Chin Lin: Pioneering Innovations in Semiconductor Technology

Introduction:

Inventor Hsien-Chin Lin, hailing from Hsinchu, Taiwan, is a trailblazer in the world of inventors, known for his unwavering passion for innovation and cutting-edge technological advancements. His relentless dedication to pushing the boundaries of technology has cemented his position as a prominent figure in the industry, inspiring future generations of innovators to think outside the box.

Latest Patents:

Hsien-Chin Lin has an impressive portfolio of 28 patents, with his latest groundbreaking inventions including:

1. "Etch stop layer between substrate and isolation structure": a device incorporating advanced semiconductor technologies.

2. "Cut metal gate process for reducing transistor spacing": a semiconductor structure revolutionizing transistor spacing in the industry.

Career Highlights:

Hsien-Chin Lin is currently contributing his expertise to Taiwan Semiconductor Manufacturing Company Ltd. (TSMC), a leading player in the semiconductor manufacturing industry. His innovative solutions and technological contributions have helped propel TSMC to the forefront of semiconductor innovation.

Collaborations:

Throughout his illustrious career, Hsien-Chin Lin has collaborated with esteemed coworkers such as Ming-Chang Wen and Chang-Yun Chang. Together, they have spearheaded numerous projects, driving technological advancements and shaping the future of semiconductor technology.

Conclusion:

Inventor Hsien-Chin Lin's remarkable journey is a testament to his unwavering commitment to innovation and excellence in the field of semiconductor technology. His groundbreaking inventions and collaborative efforts have left an indelible mark on the industry, inspiring a new wave of innovators to push the boundaries of technology further.

Profile summary based on public USPTO records.

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