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For the Inventor, By the Inventor

Meylan, France

Herve Jaouen

USPTO Granted Patents = 11

Average Co-Inventor Count = 2.1

ph-index = 5

Forward Citations = 217(Granted Patents)


Location History:

  • Meylan, FR (2000 - 2006)
  • Saint Nazaire les Eymes, FR (2018 - 2020)

Company Filing History:

goldMedal11 out of 2,426 
 
Stmicroelectronics S.a.
 patents

Years Active: 2000-2020

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11 patents (USPTO):
1. 10535552 - Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtained (2020-01-14),
2. 9929039 - Method for manufacture of a semiconductor wafer suitable for the manufacture of an SOI substrate, and SOI substrate wafer thus obtained (2018-03-27),
3. 7029991 - Method for making a SOI semiconductor substrate with thin active semiconductor layer (2006-04-18),
4. 6897545 - Lateral operation bipolar transistor and a corresponding fabrication process (2005-05-24),
5. 6673703 - Method of fabricating an integrated circuit (2004-01-06),
6. 6623993 - Method of determining the time for polishing the surface of an integrated circuit wafer (2003-09-23),
7. 6503812 - Fabrication process for a semiconductor device with an isolated zone (2003-01-07),
8. 6423996 - Process for fabricating a metal-metal capacitor within an integrated circuit, and corresponding integrated circuit (2002-07-23),
9. 6100595 - Semiconductor device having optoelectronic remote signal-exchange means (2000-08-08),
10. 6081030 - Semiconductor device having separated exchange means (2000-06-27),
11. 6031445 - Transformer for integrated circuits (2000-02-29),

Title: Innovator Insights: The Contributions of Herve Jaouen in Semiconductor Technology

Introduction: Herve Jaouen, a prominent inventor based in Meylan, France, has made significant contributions to the field of semiconductor technology. With a remarkable portfolio of 11 patents, Jaouen’s work primarily focuses on advancements in the manufacturing processes of semiconductor wafers, specifically tailored for Silicon-On-Insulator (SOI) substrates.

Latest Patents: Among his latest inventions, Jaouen developed a method for the manufacture of a semiconductor wafer suitable for the production of an SOI substrate. This innovative patent involves producing a first layer of polycrystalline semiconductor on the top side of a semiconductor carrier. Subsequently, he details the formation of an interface zone on this first layer, featuring a structure that differs from the crystal structure of the first layer. Finally, a second layer of polycrystalline semiconductor is produced on this interface zone, marking a significant leap forward in semiconductor manufacturing techniques.

Career Highlights: Jaouen's prolific career at STMicroelectronics S.A., a leading global semiconductor company, showcases his dedication to pioneering research and development in the industry. His expertise and innovative mindset have driven advancements that have enhanced semiconductor fabrication technologies.

Collaborations: Throughout his career, Jaouen has collaborated with esteemed colleagues such as Michel Marty and Olivier Menut, contributing to a collaborative environment that fosters innovation and technological progress within the company.

Conclusion: Herve Jaouen's contributions to semiconductor technology, particularly in developing efficient methods for manufacturing SOI substrates, underscore his role as an influential inventor in the field. His patented methodologies not only demonstrate his innovative spirit but also pave the way for advancements in semiconductor applications, benefiting the broader technology landscape.

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