IDiyas

For the Inventor, By the Inventor

Boise, ID, United States of America

Harsh Narendrakumar Jain

USPTO Granted Patents = 21 

Average Co-Inventor Count = 3.3

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:

goldMedal19 out of 37,905 
 
Micron Technology Incorporated
 patents
where one patent can have more than one assignee

Years Active: 2021-2025

where 'Filed Patents' based on already Granted Patents

21 patents (USPTO):
1. 12482752 - Memory circuitry and method used in forming memory circuitry (2025-11-25),
2. 12438076 - Memory array having an intervening material between adjacent memory blocks with an elongated seam therein (2025-10-07),
3. 12394711 - Microelectronic devices with staircased stadiums and both through-step and to-step contacts, and related systems and methods (2025-08-19),
4. 12374619 - Microelectronic devices with different staircased stadiums having consistent multi-tier step riser height, and related systems and methods (2025-07-29),
5. 12278180 - Memory arrays and methods used in forming a memory array (2025-04-14),
6. 12267997 - Microelectronic devices comprising stack structures having pillars and elliptical conductive contacts (2025-04-01),
7. 12237259 - Electronic devices comprising multilevel bitlines, and related methods and systems (2025-02-25),
8. 12218008 - Memory device including self-aligned conductive contacts (2025-02-04),
9. 11961801 - Integrated circuitry, memory circuitry comprising strings of memory cells, and method of forming integrated circuitry (2024-04-16),
10. 11856763 - Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems (2023-12-26),
11. 11830815 - Microelectronic devices including stair step structures, and related electronic systems and methods (2023-11-28),
12. 11785775 - Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems (2023-10-10),
13. 11700727 - Microelectronic device structures including tiered stacks comprising staggered block structures separated by slot structures, and related electronic systems and methods (2023-07-11),
14. 11682581 - Memory device including self-aligned conductive contacts (2023-06-20),
15. 11641741 - Microelectronic devices with tiered blocks separated by progressively spaced slits, and related methods and systems (2023-05-02),

Title: Harsh Narendrakumar Jain: Pioneering Inventor from Boise

Introduction: Harsh Narendrakumar Jain is a distinguished inventor based in Boise, Idaho, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Harsh Narendrakumar Jain holds several patents in the areas of artificial intelligence, renewable energy, and sustainable technologies, showcasing his versatility and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Harsh Narendrakumar Jain has worked with leading tech companies, research institutions, and universities, consistently pushing the boundaries of what is possible in the realm of innovation.

Collaborations: Throughout his career, Harsh Narendrakumar Jain has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of creativity and excellence in all his projects.

Conclusion: Harsh Narendrakumar Jain's passion for innovation, coupled with his relentless drive to solve complex challenges, has solidified his reputation as a visionary inventor shaping the future of technology.

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