Company Filing History:

8 out of 203

Pdf Solutions, Incorporated

patents

7 out of 2,546

Cadence Design Systems, Inc.

patents

1 out of 1

Cadence Design Sysyems, Inc.

patent

Years Active: 2004-2013

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16 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8429588 - Method and mechanism for extraction and recognition of polygons in an IC design (2013-04-23),

2. 7913206 - Method and mechanism for performing partitioning of DRC operations (2011-03-22),

3. 7908579 - Method and mechanism for extraction and recognition of polygons in an IC design (2011-03-15),

4. 7904852 - Method and system for implementing parallel processing of electronic design automation tools (2011-03-08),

5. 7657856 - Method and system for parallel processing of IC design layouts (2010-02-02),

6. 7617465 - Method and mechanism for performing latch-up check on an IC design (2009-11-10),

7. 7555736 - Method and system for using pattern matching to process an integrated circuit design (2009-06-30),

8. 7508071 - Adjusting die placement on a semiconductor wafer to increase yield (2009-03-24),

9. 7440869 - Mapping yield information of semiconductor dice (2008-10-21),

10. 7418682 - Method and mechanism for performing DRC processing with reduced passes through an IC design (2008-08-26),

11. 7334205 - Optimization of die placement on wafers (2008-02-19),

12. 7220605 - Selecting dice to test using a yield map (2007-05-22),

13. 7190183 - Selecting die placement on a semiconductor wafer to reduce test time (2007-03-13),

14. 7169638 - Adjusting die placement on a semiconductor wafer to increase yield (2007-01-30),

15. 7039543 - Transforming yield information of a semiconductor fabrication process (2006-05-02),

Title: Eitan Cadouri: Innovator in Integrated Circuit Design

Introduction

Eitan Cadouri is a prominent inventor based in Cupertino, CA, known for his significant contributions to integrated circuit (IC) design. With a total of 16 patents to his name, Cadouri has developed innovative methods that enhance the efficiency and effectiveness of IC design processes.

Latest Patents

Among his latest patents is a "Method and mechanism for extraction and recognition of polygons in an IC design." This patent discloses an improved approach for organizing, analyzing, and operating upon polygon data, significantly reducing the amount of data required for processing while ensuring that elements do not interface with each other. The method involves extracting clusters of elements that are then handled separately, allowing for a more efficient analysis of repetitive unique patterns within the design.

Another notable patent is the "Method and mechanism for performing partitioning of DRC operations." This invention presents an improved method for data partitioning in a Design Rule Check (DRC) tool, enabling efficient parallelization and multithreading for DRC analysis. By identifying different types of rules and data, the method allows for varied processing techniques, optimizing the overall performance of IC design analysis.

Career Highlights

Eitan Cadouri has worked with several reputable companies in the tech industry, including Pdf Solutions, Incorporated and Cadence Design Systems, Inc. His experience in these organizations has contributed to his expertise in IC design and innovation.

Collaborations

Throughout his career, Cadouri has collaborated with notable professionals, including Roland Ruehl and Anwar Adkhamovich Irmatov. These collaborations have further enriched his work and contributed to the advancement of technology in the field of integrated circuits.

Conclusion

Eitan Cadouri's innovative contributions to integrated circuit design have made a significant impact on the industry. His patents reflect a commitment to improving efficiency and effectiveness in IC design processes.

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