Danny R Cline

This inventor holds 17 USPTO granted patents, primarily in Integrated Circuit Testing. Top assignee: Texas Instruments Corporation. Active years: 1993-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Danny R Cline. Retrieved from https://idiyas.com/inventor/danny-r-cline

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 17

% Patents Active = 88.2

Average Co-Inventor Count = 2.5

ph-index = 10

Forward Citations = 241(Granted Patents)

Location History:

Plano, TX (US) (1993 - 2002)
Dallas, TX (US) (1999 - 2008)

Company Filing History:

17 out of 29,922

Texas Instruments Corporation

patents

Years Active: 1993-2008

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Areas of Expertise:

Integrated Circuit

Built-in Self-Test

Memory Devices

Test Validation

Programmable Timing Generator

Stress Mode Arrangement

Dynamic Random Access

Subarray Testing

Clock Option

Data Invert Instruction

Semiconductor

Bias Generator

17 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7328388 - Built-in self-test arrangement for integrated circuit memory devices (2008-02-05),

2. 7278078 - Built-in self-test arrangement for integrated circuit memory devices (2007-10-02),

3. 6801461 - Built-in self-test arrangement for integrated circuit memory devices (2004-10-05),

4. 6438718 - Wordline stress mode arrangement a storage cell initialization scheme test time reduction burn-in elimination (2002-08-20),

5. 6353563 - Built-in self-test arrangement for integrated circuit memory devices (2002-03-05),

6. 6014336 - Test enable control for built-in self-test (2000-01-11),

7. 6002286 - Apparatus and method for a programmable interval timing generator in a (1999-12-14),

8. 5991213 - Short disturb test algorithm for built-in self-test (1999-11-23),

9. 5959912 - ROM embedded mask release number for built-in self-test (1999-09-28),

10. 5953272 - Data invert jump instruction test for built-in self-test (1999-09-14),

11. 5923599 - Apparatus and method for subarray testing in dynamic random access (1999-07-13),

12. 5883843 - Built-in self-test arrangement for integrated circuit memory devices (1999-03-16),

13. 5875153 - Internal/external clock option for built-in self test (1999-02-23),

14. 5841707 - Apparatus and method for a programmable interval timing generator in a (1998-11-24),

15. 5742614 - Apparatus and method for a variable step address generator (1998-04-21),

Title: The Innovations of Danny R Cline

Introduction

Danny R Cline is a prominent inventor based in Plano, Texas. He has made significant contributions to the field of integrated circuit technology, holding a total of 17 patents. His work has been instrumental in advancing the capabilities of memory devices.

Latest Patents

One of Danny's latest patents is a built-in self-test arrangement for integrated circuit memory devices. This innovative design includes a built-in self-test (BIST) arrangement that features a read-only memory (ROM) to store test algorithm instructions. The ROM logic circuit receives instructions from the ROM and produces a group of output signals based on those instructions. A BIST register then receives and stores these output signals to control the self-test of the integrated circuit.

Career Highlights

Danny R Cline has had a successful career at Texas Instruments Corporation, where he has been able to apply his expertise in integrated circuits. His contributions have not only enhanced the functionality of memory devices but have also paved the way for future innovations in the field.

Collaborations

Danny has collaborated with notable coworkers such as Kuong Hua Hii and Theo J Powell. Their teamwork has fostered an environment of innovation and creativity, leading to the development of groundbreaking technologies.

Conclusion

Danny R Cline's work exemplifies the spirit of innovation in the field of integrated circuits. His patents and collaborations continue to influence the industry, showcasing the importance of creativity and teamwork in technological advancements.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]