Watervliet, NY, United States of America

Daniel James Dechene

This inventor holds 26 USPTO granted patents and 4 published patent applications, primarily in Semiconductor Technology. Top assignees: International Business Machines Corporation, Globalfoundries Inc., International Business Machines Corproation. Active years: 2014-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Daniel James Dechene. Retrieved from https://idiyas.com/inventor/daniel-james-dechene

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 26 

% Patents Active = 88.5

Average Co-Inventor Count = 4.5

ph-index = 2

Forward Citations = 47(Granted Patents)


Location History:

  • Wappingers Falls, NY (US) (2014 - 2019)
  • Watervliet, NY (US) (2017 - 2024)
  • Albany, NY (US) (2024)

Company Filing History:


Years Active: 2014-2026

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Areas of Expertise:
Field-Effect Transistor
Interconnect Structure
Nanosheet Devices
Buried Power Distribution
Circuit Design Watermarking
Lithographic Double Patterning
Dummy Fill Scheme
Threshold Voltage Method
Polysilicon Gate Arrays
Capacitance
Patterning Assist Feature
Self-Aligned Contact Openings
26 patents (USPTO):Explore Patents

Title: **Daniel James Dechene: An Innovator in Semiconductor Technology**

Introduction

Daniel James Dechene, based in Watervliet, NY, is an accomplished inventor with a remarkable portfolio of 21 patents to his name. His work primarily focuses on advancements in semiconductor technology, contributing significantly to the fields of direct print methodologies and vertical transport field-effect transistor designs.

Latest Patents

Among his latest innovations, one notable patent is titled "Using a Same Mask for Direct Print and Self-Aligned Double Patterning of Nanosheets." This method involves forming a semiconductor structure where nanosheet channels are created for field-effect transistors, employing a hard mask stack and a lithographic mask that improves the precision in the fabrication process.

Another significant patent is "Precise Bottom Junction Formation for Vertical Transport Field Effect Transistor with Highly Doped Epitaxial Source/Drain." This method details the epitaxial growth of source-drain regions within a substrate, emphasizing precise junction formation and design for improved device performance and reduced parasitic capacitance.

Career Highlights

Daniel has primarily worked with renowned tech companies, including International Business Machines Corporation (IBM) and Globalfoundries Inc., where he has applied his knowledge and expertise to real-world applications in the semiconductor industry. His contributions to these companies have helped advance innovative semiconductor solutions and device architectures.

Collaborations

Throughout his career, Daniel has collaborated with notable peers, including Somnath Ghosh and Lawrence A Clevenger. These collaborations have fostered an environment of creativity and innovation, further enhancing the semiconductor technologies they worked on.

Conclusion

Daniel James Dechene continues to be a significant figure in semiconductor innovation. His patents not only highlight his technical expertise but also reflect his commitment to advancing technology in the field. As he progresses in his career, his contributions are likely to inspire further advancements in semiconductor devices and materials science.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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