The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2022

Filed:

Feb. 20, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Timothy Mathew Philip, Albany, NY (US);

Daniel James Dechene, Watervliet, NY (US);

Somnath Ghosh, Clifton Park, NY (US);

Robert Robison, Rexford, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 21/033 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76816 (2013.01); H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/31144 (2013.01); H01L 21/32139 (2013.01); H01L 21/76892 (2013.01);
Abstract

A method for fabricating a semiconductor device includes forming a first line pattern within sacrificial mandrel material disposed on at least one hard mask layer disposed on a substrate. The first line pattern has a pitch defined by a target line width and a minimum width of space between lines. The method further includes forming, within the first line pattern, a first spacer having a width corresponding to the minimum width of space between lines to minimize pinch points and a first gap having the target line width, and forming a first plug within the first gap corresponding to a first location above the at least one hard mask layer to block pattern transfer into the at least one hard mask layer.


Find Patent Forward Citations

Loading…