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For the Inventor, By the Inventor

Mountain View, CA, United States of America

Concetta E Riccobene

USPTO Granted Patents = 15 

Average Co-Inventor Count = 2.1

ph-index = 8

Forward Citations = 250(Granted Patents)


Company Filing History:

goldMedal15 out of 12,867 
 
Advanced Micro Devices Corporation
 patents

Years Active: 2001-2004

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15 patents (USPTO):
1. 6765227 - Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer and method of fabrication using wafer bonding (2004-07-20),
2. 6717212 - Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure (2004-04-06),
3. 6667512 - Asymmetric retrograde halo metal-oxide-semiconductor field-effect transistor (MOSFET) (2003-12-23),
4. 6548335 - Selective epitaxy to reduce gate/gate dielectric interface roughness (2003-04-15),
5. 6538284 - SOI device with body recombination region, and method (2003-03-25),
6. 6525378 - Raised S/D region for optimal silicidation to control floating body effects in SOI devices (2003-02-25),
7. 6515333 - Removal of heat from SOI device (2003-02-04),
8. 6479868 - Silicon-on-insulator transistors with asymmetric source/drain junctions formed by angled germanium implantation (2002-11-12),
9. 6475816 - Method for measuring source and drain junction depth in silicon on insulator technology (2002-11-05),
10. 6410371 - Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer (2002-06-25),
11. 6396103 - Optimized single side pocket implant location for a field effect transistor (2002-05-28),
12. 6391767 - Dual silicide process to reduce gate resistance (2002-05-21),
13. 6274501 - Formation of structure to accurately measure source/drain resistance (2001-08-14),
14. 6242329 - Method for manufacturing asymmetric channel transistor (2001-06-05),
15. 6229184 - Semiconductor device with a modulated gate oxide thickness (2001-05-08),

Title: Concetta E Riccobene: Innovator in Semiconductor Technology

Introduction

Concetta E Riccobene is a prominent inventor based in Mountain View, CA (US). She has made significant contributions to the field of semiconductor technology, holding a total of 15 patents. Her work has been instrumental in advancing the capabilities of semiconductor-on-insulator (SOI) structures.

Latest Patents

Among her latest patents is a groundbreaking invention related to a semiconductor-on-insulator (SOI) wafer. This wafer features a Si/SiGe/Si active layer and a method of fabrication using wafer bonding. The design includes a silicon substrate, a buried oxide (BOX) layer, and an active layer with an upper silicon layer on a silicon-germanium layer. The silicon-germanium layer is strategically placed on a lower silicon layer, with the strained silicon-germanium being approximately 200 to 400 angstroms thick. Another notable patent involves a device and method for creating an SOI structure that incorporates a leaky, thermally conductive insulator material (LTCIM) layer between a semiconductor substrate and a semiconductor layer.

Career Highlights

Concetta is currently employed at Advanced Micro Devices Corporation, where she continues to push the boundaries of semiconductor technology. Her innovative work has garnered attention and respect within the industry.

Collaborations

Throughout her career, Concetta has collaborated with esteemed colleagues, including Carl Robert Huster and Bin Yu. These partnerships have further enriched her contributions to the field.

Conclusion

Concetta E Riccobene stands out as a leading figure in semiconductor innovation. Her patents and ongoing work at Advanced Micro Devices Corporation highlight her commitment to advancing technology in this critical area.

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