The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6479868 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 12, 2002

Filed:

Apr. 30, 2001
Applicant:
Inventors:

Xilin Judy An, San Jose, CA (US);

Bin Yu, Cupertino, CA (US);

Concetta E. Riccobene, Mountain View, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/701 ;
U.S. Cl.
CPC ...
H01L 2/701 ;
Abstract

A silicon-on-insulator (SOI) transistor. The SOI transistor includes a germanium implanted source and drain having a body disposed therebetween, and a gate disposed on the body, the germanium being implanted at an angle such that the source has a concentration of germanium at a source/body junction and the gate shields germanium implantation in the drain adjacent a drain/body junction resulting in a graduated drain/body junction. Also disclosed is a method of fabricating the SOI transistor.


Find Patent Forward Citations

An, Xilin. (2002). Silicon-on-insulator transistors with asymmetric source/drain junctions formed by angled germanium implantation (U.S. Patent No. 6479868). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6479868

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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