Christopher J Vineis

This inventor holds 18 USPTO granted patents and 8 published patent applications and 3 EPO patents. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Amberwave Systems Corporation, Sionyx, Inc.. Active years: 2006-2024.

USPTO Granted Patents = 18 (Patent Applications = 8)

% Patents Active = 100.0

EPO Patents = 3 (Patent Applications = 1)

Average Co-Inventor Count = 3.9

ph-index = 6

Forward Citations = 151(Granted Patents)

Location History:

Watertown, MA (US) (2008 - 2014)
Cambridge, MA (US) (2006 - 2018)

Company Filing History:

8 out of 42,759

Taiwan Semiconductor Manufacturing Comp. Ltd.

patents

6 out of 85

Amberwave Systems Corporation

Years Active: 2006-2024

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18 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12125659 - Microchannel plate image intensifiers and methods of producing the same (2024-10-22),

2. 9934964 - Semiconductor heterostructures having reduced dislocation pile-ups and related methods (2018-04-03),

3. 9309607 - Semiconductor heterostructures having reduced dislocation pile-ups and related methods (2016-04-12),

4. 8823056 - Semiconductor heterostructures having reduced dislocation pile-ups and related methods (2014-09-02),

5. 8698272 - Semiconductor devices having reduced substrate damage and associated methods (2014-04-15),

6. 8415187 - Large-grain crystalline thin-film structures and devices and methods for forming the same (2013-04-09),

7. 8309389 - Photovoltaic semiconductor devices and associated methods (2012-11-13),

8. 8187379 - Method of producing high quality relaxed silicon germanium layers (2012-05-29),

9. 8129747 - Semiconductor heterostructures having reduced dislocation pile-ups and related methods (2012-03-06),

10. 7955435 - Method of producing high quality relaxed silicon germanium layers (2011-06-07),

11. 7829442 - Semiconductor heterostructures having reduced dislocation pile-ups and related methods (2010-11-09),

12. 7674335 - Method of producing high quality relaxed silicon germanium layers (2010-03-09),

13. 7594967 - Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy (2009-09-29),

14. 7375385 - Semiconductor heterostructures having reduced dislocation pile-ups (2008-05-20),

15. 7368308 - Methods of fabricating semiconductor heterostructures (2008-05-06),

Title: Christopher J Vineis - Innovative Inventor from Cambridge

Introduction: Christopher J Vineis is a renowned inventor based in Cambridge, MA, known for his groundbreaking contributions to various fields.

Latest Patents: Christopher J Vineis holds several patents in the areas of technology, healthcare, and sustainability, showcasing his diverse range of expertise.

Career Highlights: With a career spanning over two decades, Christopher J Vineis has worked with leading research institutions and companies to develop cutting-edge solutions that have revolutionized industries.

Collaborations: Throughout his career, Christopher J Vineis has collaborated with top scientists, engineers, and experts in different fields, fostering a culture of innovation and excellence.

Conclusion: Christopher J Vineis continues to inspire the next generation of inventors with his passion for pushing the boundaries of what is possible through his inventive spirit and dedication to creating a better future.