Taiwan Semiconductor Manufacturing Comp. Ltd.

Amberwave Systems Corporation

Sionyx, Inc.

Solexant Corporation

Christopher J Vineis

Richard Charles Westhoff

Matthew T Currie

Christopher W Leitz

Vicky K Yang

Eugene A Fitzgerald

Thomas A Langdo

Susan A Alie

Martin U Pralle

Mayank T Bulsara

James Edward Carey

Leslie G Fritzemeier

Stephen D Saylor

Xia Li

Image intensifier systems incorporating a microchannel plate (MCP) and methods for producing the same are disclosed. In some examples, a device is disclosed that includes a first substrate having a radiation-receiving first surface and an opposed second surface through which electromagnetic radiation is transmitted. A second substrate is coupled to the first substrate to define a vacuum cavity therebetween. An electron-emitting photocathode is disposed within the vacuum cavity for generating electrons from electromagnetic radiation transmitted through the second surface. A microchannel plate is disposed within the vacuum cavity and defines microchannels extending from an input end to an output end. Each of the microchannels is configured to generate electrons in response to an electron generated by the photocathode being received through the input end of the respective microchannel. A phosphorescent layer also is disposed within the vacuum cavity and adjacent the output ends of the microchannels of the microchannel plate.

Microchannel plate image intensifiers and methods of producing the same

Dislocation pile-ups in compositionally graded semiconductor layers are reduced or eliminated, thereby leading to increased semiconductor device yield and manufacturability. This is accomplished by introducing a semiconductor layer having a plurality of threading dislocations distributed substantially uniformly across its surface as a starting layer and/or at least one intermediate layer during growth and relaxation of the compositionally graded layer. The semiconductor layer may include a seed layer disposed proximal to the surface of the semiconductor layer and having the threading dislocations uniformly distributed therein.

Semiconductor heterostructures having reduced dislocation pile-ups and related methods

Optoelectronic devices, materials, and associated methods having increased operating performance are provided. In one aspect, for example, an optoelectronic device can include a semiconductor material, a first doped region in the semiconductor material, a second doped region in the semiconductor material forming a junction with the first doped region, and a laser processed region associated with the junction. The laser processed region is positioned to interact with electromagnetic radiation. Additionally, at least a portion of a region of laser damage from the laser processed region has been removed such that the optoelectronic device has an open circuit voltage of from about 500 mV to about 800 mV.

Semiconductor devices having reduced substrate damage and associated methods

Methods for forming semiconductor devices include providing a crystalline template having an initial grain size, annealing the crystalline template, the annealed template having a final grain size larger than the initial grain size, forming a buffer layer over the annealed template, and forming a semiconductor layer over the buffer layer.

Large-grain crystalline thin-film structures and devices and methods for forming the same

Photovoltaic semiconductor devices and associated methods are provided. In one aspect, for example, a method of making a photovoltaic semiconductor device having enhanced electromagnetic radiation absorption can include applying a damage removal etch (DRE) to a semiconductor material to an RMS surface roughness of from about 0.5 nm to about 50 nm and texturing a single side of the semiconductor material. The texturing further includes irradiating a target region of the semiconductor material with laser radiation to create features having a size of from about 50 nm to about 10 microns.

Photovoltaic semiconductor devices and associated methods

A method for minimizing particle generation during deposition of a graded SiGelayer on a semiconductor material includes providing a substrate in an atmosphere including a Si precursor and a Ge precursor, wherein the Ge precursor has a decomposition temperature greater than germane, and depositing the graded SiGelayer having a final Ge content of greater than about 0.15 and a particle density of less than about 0.3 particles/cmon the substrate.

Method of producing high quality relaxed silicon germanium layers

A method for minimizing particle generation during deposition of a graded Si.sub.1-xGe.sub.x layer on a semiconductor material includes providing a substrate in an atmosphere including a Si precursor and a Ge precursor, wherein the Ge precursor has a decomposition temperature greater than germane, and depositing the graded Si.sub.1-xGe.sub.x layer having a final Ge content of greater than about 0.15 and a particle density of less than about 0.3 particles/cm.sup.2 on the substrate.

A semiconductor structure including a cap layer formed over a semiconductor substrate having a rough edge, which discourages formation of dislocation pile-up defects.

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Cambridge, MA, United States of America

Christopher J Vineis