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For the Inventor, By the Inventor

Hsinchu, Taiwan

Chien-Chang Lee

This inventor holds 35 USPTO granted patents and 14 published patent applications, primarily in Semiconductor Packaging. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2010-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chien-Chang Lee. Retrieved from https://idiyas.com/inventor/chien-chang-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 35 

% Patents Active = 100.0

Average Co-Inventor Count = 4.4

ph-index = 2

Forward Citations = 15(Granted Patents)


Location History:

  • Hsin-Chu, TW (2010 - 2024)
  • Miaoli County, TW (2021 - 2024)

Company Filing History:

goldMedal35 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2010-2026

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Areas of Expertise:
Semiconductor Structures
Deep Trench Capacitor
Three-Dimensional Integrated Circuit
Photonic Device
Guard Ring Structure
Test Line Structure
Fiber to Chip Coupler
Interposer
Integrated Passive Device
Substrate-Embedded Device
Contact Resistance
Testing Apparatus
35 patents (USPTO):Explore Patents
1. 12721120 - Semiconductor structures with improved metal capping layers (2026-08-25),
2. 12684871 - Shielded deep trench capacitor structure and methods of forming the same (2026-07-14),
3. 12616022 - Capacitor device and manufacturing method thereof (2026-04-28),
4. 12519021 - Semiconductor package including test line structure (2026-01-06),
5. 12463099 - Semiconductor package including test line structure (2025-11-04),
6. 12417987 - Semiconductor die including guard ring structure and three-dimensional device structure including the same (2025-09-16),
7. 12362323 - Three-dimensional integrated circuit (2025-07-15),
8. 12322679 - Semiconductor die including through substrate via barrier structure and methods for forming the same (2025-06-03),
9. 12278167 - Semiconductor die including through substrate via barrier structure and methods for forming the same (2025-04-14),
10. 12272724 - Three-dimensional device structure including substrate-embedded integrated passive device and methods for making the same (2025-04-08),
11. 12261133 - Interposer with warpage-relief trenches (2025-03-25),
12. 12169308 - Method of using fiber to chip coupler and method of making (2024-12-17),
13. 12153255 - Method of making photonic device (2024-11-26),
14. 12094925 - Three-dimensional device structure including embedded integrated passive device and methods of making the same (2024-09-17),
15. 12094868 - Shielded deep trench capacitor structure and methods of forming the same (2024-09-17),

Title: The Innovative Journey of Chien-Chang Lee

Introduction:

Chien-Chang Lee, a distinguished inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents:

Chien-Chang Lee's latest patents include cutting-edge advancements in semiconductor technology, renewable energy solutions, and artificial intelligence systems, showcasing his versatility and forward-thinking approach.

Career Highlights:

With a career spanning over two decades, Chien-Chang Lee has held key positions in leading tech companies, where he spearheaded research and development projects that have revolutionized various industries. His expertise in patent law has also been instrumental in protecting his inventions and ensuring their commercial success.

Collaborations:

Throughout his career, Chien-Chang Lee has collaborated with top researchers, engineers, and industry experts to bring his ideas to life. His ability to foster productive partnerships has led to the creation of innovative products that have had a lasting impact on the market.

Conclusion:

In conclusion, Chien-Chang Lee's passion for innovation, coupled with his technical acumen and strategic vision, has established him as a trailblazer in the world of technology. His relentless pursuit of excellence continues to inspire the next generation of inventors and entrepreneurs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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