Portland, OR, United States of America

Chieh-jen Ku

This inventor holds 4 USPTO granted patents and 3 published patent applications. Top assignee: Intel Corporation. Active years: 2024-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chieh-jen Ku. Retrieved from https://idiyas.com/inventor/chieh-jen-ku-8d4lx6r9

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 4 

% Patents Active = 75.0

Average Co-Inventor Count = 9.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2024-2026

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4 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Chieh-jen Ku in Memory Technology**

Introduction

Chieh-jen Ku is a notable inventor based in Portland, OR, who has made significant strides in the field of memory technology. With a total of two patents to his name, his innovative work at Intel Corporation continues to contribute to advancements in integrated circuit structures and memory cell designs.

Latest Patents

Chieh-jen Ku's most recent patents showcase his ingenuity in the realm of two transistor memory cells. One patent describes a two transistor memory cell utilizing stacked thin-film transistors (TFTs) as access and gain transistors. This design allows for a stacked architecture, where one or both transistors can be positioned in different layers above a substrate. By implementing an access TFT in a first layer and a gain TFT in a second layer, this innovative approach permits an increase in memory cell density within a given footprint area or minimizes the footprint area of a memory array with existing memory cell density.

In another related patent, Ku presents innovations regarding transistors, memory cells, and their arrangements. This includes integrated circuit (IC) structures where transistors are organized in a hexagonally packed configuration. Additionally, he introduces a memory cell design featuring an axially symmetric transistor paired with an axially symmetric capacitor, aligning their axes for improved efficiency.

Career Highlights

Chieh-jen Ku's career is marked by his commitment to advancing memory technologies, particularly during his tenure at Intel Corporation. His expertise in transistor technology and memory cell architecture has positioned him as a key innovator in the semiconductor industry, contributing to advancements that enhance performance and efficiency in electronic devices.

Collaborations

Throughout his career, Ku has collaborated with talented individuals such as Abhishek A Sharma and Bernhard Sell. These partnerships foster creative innovation, allowing them to tackle complex challenges in the field of memory technology together and push the boundaries of what’s possible in integrated circuit design.

Conclusion

Chieh-jen Ku exemplifies the role of an inventor in pushing technological boundaries with his creative patents. His contributions, particularly in the design of memory cells and transistor arrangements, have the potential to significantly impact the future of electronic devices. As he continues his work at Intel Corporation, the innovations he develops are sure to play a crucial role in the evolution of memory technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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