Jhunan, Taiwan

Cheng-Hung Yeh

USPTO Granted Patents = 18 

Average Co-Inventor Count = 5.5

ph-index = 3

Forward Citations = 31(Granted Patents)


Location History:

  • Jhunan Township, Miaoli County, TW (2011)
  • Jhunan, TW (2014)
  • Miaoli County, TW (2016 - 2022)
  • Hsinchu, TW (2022)
  • Jhunan Township, TW (2012 - 2023)

Company Filing History:


Years Active: 2011-2025

where 'Filed Patents' based on already Granted Patents

18 patents (USPTO):

Title: Cheng-Hung Yeh: Innovator in Semiconductor Technology

Introduction

Cheng-Hung Yeh is a prominent inventor based in Jhunan, Taiwan, known for his significant contributions to semiconductor technology. With a total of 18 patents to his name, he has made remarkable advancements in integrated circuit packaging and chip architecture.

Latest Patents

One of his latest patents is focused on SOIC chip architecture. This invention describes a device, such as a computer system, that includes an interconnection device die and at least two additional device dice. The additional device dies can be system on integrated chip (SOIC) dies laying face to face (F2F) on the interconnection device die. The interconnection device die features electrical connectors on one surface, enabling connection to and/or among the additional device dice. It also includes at least one redistribution circuit structure, which may be an integrated fan out (InFO) structure, and at least one through-silicon via (TSV). The TSV facilitates connection between a signal line, power line, or ground line from the opposite surface of the interconnection device die to the redistribution circuit structure and/or electrical connectors. Additionally, at least one of the additional dice can be a three-dimensional integrated circuit (3DIC) die with face to back (F2B) stacking.

Another notable patent involves through-silicon via in integrated circuit packaging. This patent describes structures and methods for a via structure for three-dimensional integrated circuit (IC) packaging. The via structure includes a middle portion that extends through a planar structure, with a first end and a second end each connected to the middle portion on different sides of the planar structure. One or more of the first end and the second end includes one or more of a plurality of vias and a pseudo metal layer.

Career Highlights

Cheng-Hung Yeh is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he continues to innovate and develop cutting-edge technologies in the semiconductor field. His work has significantly impacted the efficiency and performance of integrated circuits.

Collaborations

Throughout his career, Cheng-Hung has collaborated with talented individuals such as Yi-Kan Cheng and Po-Hsiang Huang, contributing to various projects and advancements in semiconductor technology.

Conclusion

Cheng-Hung Yeh is a distinguished inventor whose work in semiconductor technology has led to numerous patents and innovations. His contributions continue to shape

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