The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2017
Filed:
Jun. 06, 2016
Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;
I-Fan Lin, Hsinchu, TW;
Yi-Tang Lin, Hsinchu, TW;
Cheng-Hung Yeh, Miaoli County, TW;
Hsien-Hsin Sean Lee, Duluth, GA (US);
Chou-Kun Lin, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;
Abstract
Methods for fabricating multiple inverter structures in a multi-layer semiconductor structure are provided. A first device layer is formed on a substrate. The first device layer comprises one or more first inverter structures including a first input terminal and a first output terminal. A second device layer is formed on the first device layer. The second device layer comprises one or more second inverter structures including a second input terminal and a second output terminal. One or more inter-layer connection structures are formed. The one or more inter-layer connection structures are disposed to electrically connect the first input terminal to the second output terminal and electrically connect the first output terminal to the second input terminal.