The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2022

Filed:

Jun. 17, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Chin-Her Chien, Taoyuan County, TW;

Po-Hsiang Huang, Tainan, TW;

Cheng-Hung Yeh, Miaoli County, TW;

Tai-Yu Wang, Hsinchu, TW;

Ming-Ke Tsai, Hsinchu, TW;

Yao-Hsien Tsai, Hsinchu County, TW;

Kai-Yun Lin, Hsinchu, TW;

Chin-Yuan Huang, Hsinchu, TW;

Kai-Ming Liu, Hsinchu, TW;

Fong-Yuan Chang, Hsinchu County, TW;

Chin-Chou Liu, Hsinchu County, TW;

Yi-Kan Cheng, Taipei, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 21/565 (2013.01); H01L 23/3114 (2013.01); H01L 23/5383 (2013.01);
Abstract

A package structure and a method for forming the same are provided. The package structure includes a die, a first molding surrounding the die, a first redistribution layer (RDL), an interposer disposed over the first RDL, a second molding surrounding the interposer, a first via, and a second RDL. The first RDL includes a first dielectric layer disposed over the die and the first molding, and a first interconnect structure surrounded by the first dielectric layer and electrically connected to the die. The interposer is electrically connected to the die through the first interconnect structure. The first via extends through and within the second molding and is adjacent to the interposer. The second RDL includes a second dielectric layer disposed over the interposer and the second molding, and a second interconnect structure surrounded by the second dielectric layer and electrically connected to the via and the interposer.


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