Bok Gyu Min

This inventor holds 13 USPTO granted patents and 3 published patent applications. Top assignees: Skhynix Inc., Hynix Semiconductor Inc.. Active years: 2012-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Bok Gyu Min. Retrieved from https://idiyas.com/inventor/bok-gyu-min

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13 (Patent Applications = 3)

% Patents Active = 69.2

Average Co-Inventor Count = 2.3

ph-index = 1

Forward Citations = 4(Granted Patents)

Location History:

Gyeonggi-do, KR (2012)
Chungcheongbuk-do, KR (2014)
Incheon-si, KR (2016)
Icheon-si, KR (2013 - 2024)

Company Filing History:

Hynix Semiconductor Inc.

patents

Years Active: 2012-2026

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13 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12581961 - Substrate having a die position mark and a semiconductor die stack structure including semiconductor dies stacked on the substrate (2026-03-17),

2. 12033952 - Semiconductor packages including at least one die position checker (2024-07-09),

3. 11769700 - Semiconductor substrate, semiconductor package including semiconductor substrate, and test method of semiconductor substrate (2023-09-26),

4. 11764160 - Semiconductor packages including at least one die position checker (2023-09-19),

5. 11239177 - Semiconductor packages including die over-shift indicating patterns (2022-02-01),

6. 10692816 - Semiconductor packages including die over-shift indicating patterns (2020-06-23),

7. 10312196 - Semiconductor packages including indicators for evaluating a distance and methods of calculating the distance (2019-06-04),

8. 9412716 - Semiconductor package and method for manufacturing the same (2016-08-09),

9. 8907490 - Semiconductor packages having the first and second chip inclined sidewalls contact with each other (2014-12-09),

10. 8624375 - Semiconductor package for selecting semiconductor chip from a chip stack (2014-01-07),

11. 8525319 - Selecting chips within a stacked semiconductor package using through-electrodes (2013-09-03),

12. 8304879 - Spiral staircase shaped stacked semiconductor package and method for manufacturing the same (2012-11-06),

13. 8242582 - Semiconductor package and stacked semiconductor package having the same (2012-08-14),

Title: The Innovative Contributions of Bok Gyu Min

Introduction

Bok Gyu Min is a prominent inventor based in Icheon, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 13 patents. His work has been instrumental in advancing the efficiency and functionality of semiconductor packages.

Latest Patents

Among his latest patents, Bok Gyu Min has developed innovative semiconductor packages that include at least one die position checker. This semiconductor package features a first die disposed on a package substrate, a second die stacked on the first die, and a first position checker that indicates a first position allowable range for the first die. Another notable patent involves a semiconductor substrate that includes an upper surface and a lower surface, featuring a bump pad unit on the upper surface. This substrate is designed with test pads and traces that connect the bump pad unit to the test pads in a one-to-one manner, enhancing the testing capabilities of semiconductor devices.

Career Highlights

Bok Gyu Min has worked with leading companies in the semiconductor industry, including SK Hynix and Hynix Semiconductor. His experience in these organizations has allowed him to refine his skills and contribute to groundbreaking advancements in semiconductor technology.

Collaborations

Throughout his career, Bok Gyu Min has collaborated with talented individuals such as Da Un Nah and Sukwon Lee. These partnerships have fostered a creative environment that has led to innovative solutions in the semiconductor field.

Conclusion

Bok Gyu Min's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the industry. His work continues to influence the development of advanced semiconductor solutions.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

3 patents pending: