The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2023
Filed:
Aug. 19, 2020
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventor:
Bok Gyu Min, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); H01L 22/14 (2013.01); H01L 23/49838 (2013.01); H01L 24/06 (2013.01); H01L 24/09 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/06515 (2013.01); H01L 2224/09181 (2013.01); H01L 2224/16106 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81801 (2013.01); H01L 2224/81908 (2013.01);
Abstract
A semiconductor substrate including an upper surface and a lower surface may include a bump pad unit disposed on the upper surface. The semiconductor substrate may also include test pads disposed on the upper surface or the lower surface. The semiconductor substrate may also include traces configured to connect the bump pad unit and the test pads. The bump pad unit includes a main bump pad disposed on the upper surface, and a plurality of side bump pads disposed on the upper surface to be spaced apart from the main bump pad. The traces may connect the main bump pad and the plurality of side bump pads to the test pads in a one-to-one manner.