logo

For the Inventor, By the Inventor

Mountain View, CA, United States of America

Amy W K Liu

USPTO Granted Patents = 11

Average Co-Inventor Count = 6.3

ph-index = 6

Forward Citations = 105(Granted Patents)


Company Filing History:

goldMedal11 out of 54,780 
 
Intel Corporation
 patents

Years Active: 2009-2013

Loading Chart...
11 patents (USPTO):Explore Patents
1. 8617945 - Stacking fault and twin blocking barrier for integrating III-V on Si (2013-12-31),
2. 8143646 - Stacking fault and twin blocking barrier for integrating III-V on Si (2012-03-27),
3. 8034675 - Semiconductor buffer architecture for III-V devices on silicon substrates (2011-10-11),
4. 7851781 - Buffer layers for device isolation of devices grown on silicon (2010-12-14),
5. 7851780 - Semiconductor buffer architecture for III-V devices on silicon substrates (2010-12-14),
6. 7790536 - Dopant confinement in the delta doped layer using a dopant segregration barrier in quantum well structures (2010-09-07),
7. 7687799 - Methods of forming buffer layer architecture on silicon and structures formed thereby (2010-03-30),
8. 7601980 - Dopant confinement in the delta doped layer using a dopant segregation barrier in quantum well structures (2009-10-13),
9. 7573059 - Dislocation-free InSb quantum well structure on Si using novel buffer architecture (2009-08-11),
10. 7566898 - Buffer architecture formed on a semiconductor wafer (2009-07-28),
11. 7494911 - Buffer layers for device isolation of devices grown on silicon (2009-02-24),

Title: Innovations by Amy W K Liu

Introduction

Amy W K Liu is a prominent inventor based in Mountain View, CA. She has made significant contributions to the field of semiconductor technology, particularly in the integration of III-V materials on silicon substrates. With a total of 11 patents to her name, her work has paved the way for advancements in device manufacturing.

Latest Patents

One of her latest patents is titled "Stacking fault and twin blocking barrier for integrating III-V on Si." This invention describes a method for forming a III-V device layer on a silicon substrate. The embodiments of this invention enable the formation of III-V InSb device layers with defect densities below 1×10 cm on silicon substrates. A buffer layer is strategically positioned between the III-V device layer and the silicon substrate to facilitate the gliding of dislocations. The GaSb buffer layer is selected based on its lattice constant, band gap, and melting point to minimize the propagation of lattice defects into the III-V device layer. In a specific embodiment, a III-V InSb device layer is formed directly on the GaSb buffer.

Career Highlights

Amy W K Liu is currently employed at Intel Corporation, where she continues to innovate and contribute to the field of semiconductor technology. Her work has been instrumental in enhancing the performance and reliability of electronic devices.

Collaborations

Throughout her career, Amy has collaborated with notable colleagues, including Mantu K Hudait and Dmitri Loubychev. These collaborations have further enriched her research and development efforts.

Conclusion

Amy W K Liu's contributions to semiconductor technology and her innovative patents highlight her role as a leading inventor in her field. Her work continues to influence advancements in device manufacturing and integration.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…