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For the Inventor, By the Inventor

Fremont, CA, United States of America

Amit P Marathe

This inventor holds 57 USPTO granted patents, primarily in Semiconductor Reliability (CPC class H01L). Top assignees: Advanced Micro Devices Corporation, Spansion LLC., Globalfoundries Inc.. Active years: 2000-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Amit P Marathe. Retrieved from https://idiyas.com/inventor/amit-p-marathe

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 57

% Patents Active = 66.7

Average Co-Inventor Count = 2.6

ph-index = 12

Forward Citations = 471(Granted Patents)

Forward Citations (Not Self Cited) = 467(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Santa Clara, CA (US) (2000 - 2002)
  • Fremont, CA (US) (2004 - 2005)
  • Milpitas, CA (US) (2002 - 2010)
  • Sunnyvale, CA (US) (2006 - 2016)

Company Filing History:

goldMedal55 out of 13,175 
 
Advanced Micro Devices Corporation
 patents
silverMedal2 out of 1,075 
 
Spansion LLC.
 patents
bronzeMedal1 out of 5,671 
 
Globalfoundries Inc.
 patents
4. 1 out of 56,279 
 
Microsoft Technology Licensing, LLC
 patents
where one patent can have more than one assignee

Years Active: 2000-2016

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Areas of Expertise:
Thermal Design
Electromigration
Barrier Layers
Integrated Circuit
Dielectric Breakdown
Copper Interconnects
Line Edge Roughness
Device Reliability
Stress Testing
Memory Elements
Failure Characteristics
Alloying Elements
57 patents (USPTO):Explore Patents
1. 9495491 - Reliability aware thermal design (2016-11-15),
2. 8501504 - Method and system for non-destructive determination of dielectric breakdown voltage in a semiconductor wafer (2013-08-06),
3. 8022716 - Dielectric breakdown lifetime enhancement using alternating current (AC) capacitance (2011-09-20),
4. 7755194 - Composite barrier layers with controlled copper interface surface roughness (2010-07-13),
5. 7451411 - Integrated circuit design system (2008-11-11),
6. 7379924 - Quantifying and predicting the impact of line edge roughness on device reliability and performance (2008-05-27),
7. 7340360 - Method for determining projected lifetime of semiconductor devices with analytical extension of stress voltage window by scaling of oxide thickness (2008-03-04),
8. 7310155 - Extraction of tool independent line-edge-roughness (LER) measurements using in-line programmed LER and reliability structures (2007-12-18),
9. 7288782 - Use of Ta-capped metal line to improve formation of memory element films (2007-10-30),
10. 7155359 - Determination of device failure characteristic (2006-12-26),
11. 7146588 - Predicting EM reliability by decoupling extrinsic and intrinsic sigma (2006-12-05),
12. 7084062 - Use of Ta-capped metal line to improve formation of memory element films (2006-08-01),
13. 7033940 - Method of forming composite barrier layers with controlled copper interface surface roughness (2006-04-25),
14. 7026225 - Semiconductor component and method for precluding stress-induced void formation in the semiconductor component (2006-04-11),
15. 6952052 - Cu interconnects with composite barrier layers for wafer-to-wafer uniformity (2005-10-04),

Title: The Innovative Journey of Amit P Marathe

Introduction: Amit P Marathe is a visionary inventor based in Fremont, California. With a passion for creating groundbreaking solutions, Amit has made significant contributions to the field of technology through his inventive spirit and dedication to innovation.

Latest Patents: Amit P Marathe holds several patents in various technological domains, showcasing his versatility and creativity in developing novel ideas that push the boundaries of what is possible in the industry.

Career Highlights: Throughout his career, Amit has demonstrated a keen ability to identify gaps in the market and develop innovative solutions to address them. His work has not only earned him recognition within the industry but has also positively impacted the lives of many through the implementation of his inventions.

Collaborations: Amit P Marathe has collaborated with leading tech companies and research institutions to further his innovative projects. His ability to work effectively in multidisciplinary teams has been instrumental in bringing his ideas to life and ensuring their success in the market.

Conclusion: Amit P Marathe's journey as an inventor is a testament to his unwavering commitment to driving progress through innovation. His pioneering spirit and dedication to creating impactful solutions continue to inspire others in the industry to push the boundaries of what is possible.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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