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San Jose, CA, United States of America

Calypto Design Systems, Inc.

USPTO Granted Patents = 18

% Expired Patents = 16.7

Trademarks = 3

Forward Citations = 119

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33 inventors (with patents filed for the assignee):

Anmol Mathur (7 out of 14 patents)

Venky Ramachandran (4 out of 16 patents)

Sumit Roy (4 out of 7 patents)

4. Deepak Goyal (4 out of 5 patents)

5. Nikhil Tripathi (3 out of 7 patents)

6. Pankaj P Chauhan (3 out of 5 patents)

7. Malay Haldar (3 out of 5 patents)

8. Gagan Hasteer (3 out of 3 patents)

9. Andres Rafael Takach (3 out of 9 patents)

10. Venkatram Krishnaswamy (2 out of 9 patents)

11. Aiguo Xie (2 out of 3 patents)

12. Bryan Darrell Bowyer (2 out of 12 patents)

13. Peter Pius Gutberlet (2 out of 18 patents)

14. Rajarshi Mukherjee (1 out of 25 patents)

15. Sameer Kapoor (1 out of 3 patents)

18 patents: Sort by Forward Citations

1. 9817929 - Formal verification using microtransactions (2017-11-14),

2. 9201994 - Flexible power query interfaces and infrastructures (2015-12-01),

3. 8667434 - System, method, and computer program product for altering a hardware description based on an instruction file (2014-03-04),

4. 8621413 - System, method, and computer program product for reducing a deactivation function utilizing an optimal reduction (2013-12-31),

5. 8219949 - Nonsequential hardware design synthesis verification (2012-07-10),

6. 8205175 - Structured algorithmic programming language approach to system design (2012-06-19),

7. 8122401 - System, method, and computer program product for determining equivalence of netlists utilizing at least one transformation (2012-02-21),

8. 8117571 - System, method, and computer program product for determining equivalence of netlists utilizing abstractions and transformations (2012-02-14),

9. 8037443 - System, method, and computer program product for optimizing an altered hardware design utilizing power reports (2011-10-11),

10. 7966593 - Integrated circuit design system, method, and computer program product that takes into account the stability of various design signals (2011-06-21),

11. 7761827 - Integrated circuit design system, method, and computer program product that takes into account observability based clock gating conditions (2010-07-20),

12. 7673257 - System, method and computer program product for word-level operator-to-cell mapping (2010-03-02),

13. 7607115 - System, method and computer program product for timing-independent sequential equivalence verification (2009-10-20),

14. 7539956 - System and computer program product for simultaneous cell identification/technology mapping (2009-05-26),

15. 7350168 - System, method and computer program product for equivalence checking between designs with sequential differences (2008-03-25),

Company Overview

Calypto Design Systems, Inc. is a technology company based in San Jose, California, specializing in electronic design automation (EDA) tools. The company focuses on providing advanced solutions for hardware design and verification, particularly in the fields of system-on-chip (SoC) and integrated circuit (IC) development. Calypto's innovative software addresses critical challenges in power optimization and design efficiency, enabling engineers to create high-performance electronic systems while managing complexity and resource constraints.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 6 2026

18 Patents

#367 in San Jose, CA

#4,284 in California

#17,952 in US

#34,187 in the World

San Jose, CA, United States of America

Calypto Design Systems, Inc.

Forward Citations = 119

33 inventors:

Anmol Mathur (7 out of 14 patents)

Venky Ramachandran (4 out of 16 patents)

Sumit Roy (4 out of 7 patents)

4. Deepak Goyal (4 out of 5 patents)

5. Nikhil Tripathi (3 out of 7 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Calypto Design Systems, Inc.. Retrieved from https://idiyas.com/company/calypto-design-systems

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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