Company Filing History:

7 out of 18

Calypto Design Systems, Inc.

patents

4 out of 2,545

Cadence Design Systems, Inc.

patents

2 out of 672

Mentor Graphics Corporation

patents

4. 1 out of 1

Calypto Designs Systems

patent

Years Active: 2004-2020

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14 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10534723 - System, method, and computer program product for conditionally eliminating a memory read request (2020-01-14),

2. 9720859 - System, method, and computer program product for conditionally eliminating a memory read request (2017-08-01),

3. 8122401 - System, method, and computer program product for determining equivalence of netlists utilizing at least one transformation (2012-02-21),

4. 8117571 - System, method, and computer program product for determining equivalence of netlists utilizing abstractions and transformations (2012-02-14),

5. 7966593 - Integrated circuit design system, method, and computer program product that takes into account the stability of various design signals (2011-06-21),

6. 7761827 - Integrated circuit design system, method, and computer program product that takes into account observability based clock gating conditions (2010-07-20),

7. 7673257 - System, method and computer program product for word-level operator-to-cell mapping (2010-03-02),

8. 7350168 - System, method and computer program product for equivalence checking between designs with sequential differences (2008-03-25),

9. 7284218 - Method and system for inplace symbolic simulation over multiple cycles of a multi-clock domain design (2007-10-16),

10. 7222317 - Circuit comparison by information loss matching (2007-05-22),

11. 6832357 - Reducing datapath widths by rebalancing data flow topology (2004-12-14),

12. 6807651 - Procedure for optimizing mergeability and datapath widths of data flow graphs (2004-10-19),

13. 6772399 - Enhancing mergeability of datapaths and reducing datapath widths responsively to required precision (2004-08-03),

14. 6772398 - Reducing datapath widths responsively to upper bound on information content (2004-08-03),

Title: Inventor Anmol Mathur - A Pioneer in Memory Management Innovations

Introduction

Anmol Mathur, based in San Jose, California, is an accomplished inventor renowned for his significant contributions to the field of technology and memory management. With an impressive portfolio of 14 patents, he continuously strives to enhance efficiency in modern computing systems.

Latest Patents

Among his recent inventions, Mathur's noteworthy patent is titled "System, method, and computer program product for conditionally eliminating a memory read request." This innovative solution identifies a memory read request and assesses whether it is unnecessary. If deemed unnecessary, the system conditionally eliminates the memory read request, optimizing memory management and improving system performance significantly.

Career Highlights

Mathur's career includes influential roles at several renowned companies, including Calypto Design Systems, Inc. and Cadence Design Systems, Inc. His work in these organizations has allowed him to apply his inventive skills and make a substantial impact on the development of advanced technology solutions.

Collaborations

Throughout his journey, Anmol Mathur has had the privilege of collaborating with talented professionals, including his coworkers Venky Ramachandran and Sumit Roy. These partnerships have not only fostered innovation but also contributed to groundbreaking advancements in the industry.

Conclusion

Anmol Mathur's dedication to innovation and his impressive array of patents underscore his status as a notable inventor in the technology sector. As he continues to explore new avenues for inventiveness, the impact of his work will undoubtedly resonate throughout the field of memory management and beyond.

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