The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2012
Filed:
Jan. 21, 2010
Takeshi Senda, Niigata, JP;
Hiromichi Isogai, Niigata, JP;
Eiji Toyoda, Niigata, JP;
Kumiko Murayama, Niigata, JP;
Koji Araki, Niigata, JP;
Tatsuhiko Aoki, Niigata, JP;
Haruo Sudo, Niigata, JP;
Koji Izunome, Niigata, JP;
Susumu Maeda, Kanagawa, JP;
Kazuhiko Kashima, Kanagawa, JP;
Takeshi Senda, Niigata, JP;
Hiromichi Isogai, Niigata, JP;
Eiji Toyoda, Niigata, JP;
Kumiko Murayama, Niigata, JP;
Koji Araki, Niigata, JP;
Tatsuhiko Aoki, Niigata, JP;
Haruo Sudo, Niigata, JP;
Koji Izunome, Niigata, JP;
Susumu Maeda, Kanagawa, JP;
Kazuhiko Kashima, Kanagawa, JP;
Covalent Materials Corporation, Tokyo, JP;
Abstract
In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.