The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2023
Filed:
Jan. 03, 2022
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Shuen-Shin Liang, Hsinchu County, TW;
Ken-Yu Chang, Hsinchu, TW;
Hung-Yi Huang, Hsin-Chu, TW;
Chien Chang, Hsinchu, TW;
Chi-Hung Chuang, Changhua County, TW;
Kai-Yi Chu, Hsinchu, TW;
Chun-I Tsai, Hsinchu, TW;
Chun-Hsien Huang, Hsinchu, TW;
Chih-Wei Chang, Hsin-Chu, TW;
Hsu-Kai Chang, Hsinchu, TW;
Chia-Hung Chu, Taipei, TW;
Keng-Chu Lin, Ping-Tung, TW;
Sung-Li Wang, Hsinchu County, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Abstract
The present disclosure provides an interconnect structure and a method for forming an interconnect structure. The method for forming an interconnect structure includes forming a bottom metal line in a first interlayer dielectric layer, forming a second interlayer dielectric layer over the bottom metal line, exposing a top surface of the bottom metal line, increasing a total surface area of the exposed top surface of the bottom metal line, forming a conductive via over the bottom metal line, and forming a top metal line over the conductive via.