The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Jun. 12, 2020
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Shuen-Shin Liang, Hsinchu County, TW;
Ken-Yu Chang, Hsinchu, TW;
Hung-Yi Huang, Hsin-Chu, TW;
Chien Chang, Hsinchu, TW;
Chi-Hung Chuang, Changhua County, TW;
Kai-Yi Chu, Hsinchu, TW;
Chun-I Tsai, Hsinchu, TW;
Chun-Hsien Huang, Hsinchu, TW;
Chih-Wei Chang, Hsin-Chu, TW;
Hsu-Kai Chang, Hsinchu, TW;
Chia-Hung Chu, Taipei, TW;
Keng-Chu Lin, Ping-Tung, TW;
Sung-Li Wang, Hsinchu County, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Abstract
The present disclosure provides an interconnect structure, including a first interlayer dielectric layer, a bottom metal line including a first metal in the first interlayer dielectric layer, a conductive via including a second metal over the bottom metal line, wherein the second metal is different from the first metal, and the first metal has a first type of primary crystalline structure, and the second metal has the first type of primary crystalline structure, a total area of a bottom surface of the conductive via is greater than a total cross sectional area of the conductive via, and a top metal line over the conductive via, wherein the top metal line comprises a third metal different from the second metal.