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For the Inventor, By the Inventor

San Jose, CA, United States of America

Zhaoyin D Wu

This inventor holds 27 USPTO granted patents and 8 EPO patents, primarily in Integrated Circuit Design. Top assignees: Xilinx, Inc., Neuroprex Inc., Other. Active years: 2013-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Zhaoyin D Wu. Retrieved from https://idiyas.com/inventor/zhaoyin-d-wu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 27

% Patents Active = 96.3

 

Average Co-Inventor Count = 3.7

ph-index = 8

Forward Citations = 167(Granted Patents)


Location History:

  • San Jose, CA (US) (2013 - 2020)
  • Los Gatos, CA (US) (2023)

Company Filing History:

goldMedal23 out of 5,108 
 
Xilinx, Inc.
 patents
silverMedal3 out of 3 
 
Neuroprex Inc.
 patents
bronzeMedal1 out of 834,513 
Other
 patents

Years Active: 2013-2025

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Areas of Expertise:
Clock Data Recovery
Integrated Circuit
Adaptive Receiver
Power Efficiency
Inductive Elements
Time-Domain Reflectometry
Magnetic Stimulation
Sigma Delta Modulator
Baud-Rate CDR
Optical Filter
Tunable Phase Locked Loop
Signal Loss Detection
27 patents (USPTO):Explore Patents
1. 12487268 - Equipment design and testing using in-situ on-die time-domain reflectometry (2025-12-02),
2. 11735519 - In-package passive inductive element for reflection mitigation (2023-08-22),
3. 11668874 - Optical filter having a tapered profile (2023-06-06),
4. 11575497 - Reduced power and area efficient receiver circuitry (2023-02-07),
5. 10791009 - Continuous time linear equalization (CTLE) adaptation algorithm enabling baud-rate clock data recovery(CDR) locked to center of eye (2020-09-29),
6. 10623008 - Reconfigurable fractional-N frequency generation for a phase-locked loop (2020-04-14),
7. 10559561 - Isolation enhancement with on-die slot-line on power/ground grid structure (2020-02-11),
8. 10530561 - Adaptive method to reduce training time of receivers (2020-01-07),
9. 10434323 - Devices and methods for magnetic stimulation for the treatment of neurological disorders (2019-10-08),
10. 10348310 - Programmable digital sigma delta modulator (2019-07-09),
11. 10291239 - Delta-sigma modulator having expanded fractional input range (2019-05-14),
12. 10256968 - Systems and methods for clock and data recovery (2019-04-09),
13. 10224937 - Clock and data recovery circuit having tunable fractional-N phase locked loop (2019-03-05),
14. 10038545 - Systems and methods for clock and data recovery (2018-07-31),
15. 9882795 - Signal loss detector (2018-01-30),

Title: The Innovative Journey of Zhaoyin D Wu

Introduction:

Zhaoyin D Wu, a talented inventor based in San Jose, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents:

Zhaoyin D Wu holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing his expertise in cutting-edge technologies.

Career Highlights:

With a background in computer science and engineering, Zhaoyin D Wu has worked for top tech companies, leading research institutions, and universities, where he has spearheaded projects that have revolutionized the industry.

Collaborations:

Throughout his career, Zhaoyin D Wu has collaborated with renowned experts in the field, fostering a culture of innovation and knowledge-sharing that has led to remarkable advancements in technology.

Conclusion:

Zhaoyin D Wu's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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