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For the Inventor, By the Inventor

Hsinchu, Taiwan

Yung-Chen Chien

This inventor holds 37 USPTO granted patents and 15 published patent applications, primarily in Integrated Circuits. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Assier Conductor Manufacturing Company, Ltd., Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2020-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Yung-Chen Chien. Retrieved from https://idiyas.com/inventor/yung-chen-chien

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 37 

% Patents Active = 91.9

Average Co-Inventor Count = 6.6

ph-index = 2

Forward Citations = 14(Granted Patents)


Location History:

  • Hsinchu, TW (2020 - 2024)
  • Kaohsiung, TW (2022 - 2024)

Company Filing History:

goldMedal35 out of 42,810 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal1 out of 1 
 
Assier Conductor Manufacturing Company, Ltd.
 patent
bronzeMedal1 out of 465 
 
Taiwan Semiconductor Manufacturing Co., Ltd.
 patents
4. 1 out of 111 
 
TSMC Nanjing Company, Limited
 patents
where one patent can have more than one assignee

Years Active: 2020-2026

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Areas of Expertise:
Integrated Circuit
Flip-Flop Circuit
Data Retention
Clock Gating
Level Shifter
Semiconductor Device
Hybrid Row Height
Multi-Bit Standard Cell
Low-Power Architecture
Combinational Logic
Transistor Threshold
Diagonal Torus Network
37 patents (USPTO):Explore Patents
1. 12756381 - Low hold multi-bit flip-flop (2026-10-06),
2. 12726198 - Level shifter circuit and method of operating the same (2026-09-01),
3. 12663827 - Clock signal distribution system, integrated circuit device and method (2026-06-23),
4. 12613278 - Scan flip-flops with pre-setting combinational logic (2026-04-28),
5. 12593497 - Integrated circuit in hybrid row height structure (2026-03-31),
6. 12575187 - Integrated circuit and method of forming the same (2026-03-10),
7. 12489432 - Integrated circuit device, method and system (2025-12-02),
8. 12407337 - Flip-flop circuit and method (2025-09-02),
9. 12369389 - Integrated circuit in hybrid row height structure (2025-07-22),
10. 12355446 - Data retention circuit and method (2025-07-08),
11. 12346285 - Diagonal torus network (2025-07-01),
12. 12336295 - Integrated circuit device and method (2025-06-17),
13. 12278240 - IC logic device, layout, system, and method (2025-04-14),
14. 12243741 - Semiconductor structure and method for forming the same (2025-03-04),
15. 12199612 - Flip-flop with transistors having different threshold voltages, semiconductor device including same and methods of manufacturing same (2025-01-14),

Title: The Innovative Journey of Yung-Chen Chien

Introduction: Yung-Chen Chien, a distinguished inventor hailing from Hsinchu, Taiwan, has made significant contributions to the field of technology with his groundbreaking innovations.

Latest Patents: Yung-Chen Chien's most recent patents include advancements in semiconductor technology, renewable energy systems, and artificial intelligence algorithms, showcasing his versatility and forward-thinking approach.

Career Highlights: With over two decades of experience in research and development, Yung-Chen Chien has held key positions in leading tech companies, where he spearheaded projects that have revolutionized various industries. His expertise in patent law has also been instrumental in protecting his inventions.

Collaborations: Throughout his career, Yung-Chen Chien has collaborated with top researchers, engineers, and scientists from around the world, fostering a culture of innovation and knowledge-sharing. His collaborative efforts have led to the development of cutting-edge technologies that have had a lasting impact on society.

Conclusion: Yung-Chen Chien's passion for innovation, coupled with his dedication to pushing the boundaries of technology, has solidified his reputation as a visionary inventor. His relentless pursuit of excellence continues to inspire the next generation of inventors and shape the future of technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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