The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 17, 2025

Filed:

Jul. 19, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Wei-Ren Chen, Hsinchu, TW;

Cheng-Yu Lin, Hsinchu, TW;

Hui-Zhong Zhuang, Hsinchu, TW;

Yung-Chen Chien, Hsinchu, TW;

Jerry Chang Jui Kao, Hsinchu, TW;

Huang-Yu Chen, Hsinchu, TW;

Chung-Hsing Wang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 23/522 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 23/5226 (2013.01); H10D 84/0186 (2025.01); H10D 84/038 (2025.01); H10D 84/85 (2025.01);
Abstract

An integrated circuit (IC) device includes a substrate, at least one active region over the substrate and elongated along a first axis, at least one gate region extending across the at least one active region, and at least one input/output (IO) pattern configured to electrically couple one or more of the at least one active region and the at least one gate region to other circuitry. The at least one IO pattern extends obliquely to the at least one active region or the at least one gate region.


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