The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Jul. 05, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chia Chun Wu, Hsinchu, TW;

Chih-Liang Chen, Hsinchu, TW;

Hui-Zhong Zhuang, Hsinchu, TW;

Jerry Chang Jui Kao, Hsinchu, TW;

Yung-Chen Chien, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01);
U.S. Cl.
CPC ...
H10D 89/10 (2025.01); G06F 30/392 (2020.01);
Abstract

An integrated circuit includes a first and second active region extending in a first direction, and a floating gate, a first dummy gate, a first conductor and a second conductor extending in the second direction. The floating gate is electrically floating. The first dummy gate is separated from the floating gate in the second direction. The dummy gate and the floating gate separate a first cell that corresponds to a first transistor from a second cell that corresponds to a second transistor. The first and second conductors are separated from each other in the first direction, and overlap the second active region. The first and second conductors are electrically coupled to a corresponding source/drain of the second active region, and are configured to supply a same signal/voltage to the corresponding source/drain of the second active region. The floating gate is between the first and second conductors.


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